sunxi: driver refresh for 3.13
[openwrt/svn-archive/archive.git] / target / linux / sunxi / patches-3.13 / 151-4-stmmac-fixup-4.patch
1 From 523f11b5d4fd72efb72b04cd7006bfd1d1d4f341 Mon Sep 17 00:00:00 2001
2 From: Srinivas Kandagatla <srinivas.kandagatla@st.com>
3 Date: Thu, 16 Jan 2014 10:52:14 +0000
4 Subject: [PATCH] net: stmmac: move hardware setup for stmmac_open to new
5 function
6
7 This patch moves hardware setup part of the code in stmmac_open to a new
8 function stmmac_hw_setup, the reason for doing this is to make hw
9 initialization independent function so that PM functions can re-use it to
10 re-initialize the IP after returning from low power state.
11 This will also avoid code duplication across stmmac_resume/restore and
12 stmmac_open.
13
14 Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
15 Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
16 Signed-off-by: David S. Miller <davem@davemloft.net>
17 ---
18 drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 155 ++++++++++++----------
19 1 file changed, 88 insertions(+), 67 deletions(-)
20
21 diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
22 index 532f2b4..341c8dc3 100644
23 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
24 +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
25 @@ -1586,6 +1586,86 @@ static void stmmac_init_tx_coalesce(struct stmmac_priv *priv)
26 }
27
28 /**
29 + * stmmac_hw_setup: setup mac in a usable state.
30 + * @dev : pointer to the device structure.
31 + * Description:
32 + * This function sets up the ip in a usable state.
33 + * Return value:
34 + * 0 on success and an appropriate (-)ve integer as defined in errno.h
35 + * file on failure.
36 + */
37 +static int stmmac_hw_setup(struct net_device *dev)
38 +{
39 + struct stmmac_priv *priv = netdev_priv(dev);
40 + int ret;
41 +
42 + ret = init_dma_desc_rings(dev);
43 + if (ret < 0) {
44 + pr_err("%s: DMA descriptors initialization failed\n", __func__);
45 + return ret;
46 + }
47 + /* DMA initialization and SW reset */
48 + ret = stmmac_init_dma_engine(priv);
49 + if (ret < 0) {
50 + pr_err("%s: DMA engine initialization failed\n", __func__);
51 + return ret;
52 + }
53 +
54 + /* Copy the MAC addr into the HW */
55 + priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0);
56 +
57 + /* If required, perform hw setup of the bus. */
58 + if (priv->plat->bus_setup)
59 + priv->plat->bus_setup(priv->ioaddr);
60 +
61 + /* Initialize the MAC Core */
62 + priv->hw->mac->core_init(priv->ioaddr);
63 +
64 + /* Enable the MAC Rx/Tx */
65 + stmmac_set_mac(priv->ioaddr, true);
66 +
67 + /* Set the HW DMA mode and the COE */
68 + stmmac_dma_operation_mode(priv);
69 +
70 + stmmac_mmc_setup(priv);
71 +
72 + ret = stmmac_init_ptp(priv);
73 + if (ret)
74 + pr_warn("%s: failed PTP initialisation\n", __func__);
75 +
76 +#ifdef CONFIG_STMMAC_DEBUG_FS
77 + ret = stmmac_init_fs(dev);
78 + if (ret < 0)
79 + pr_warn("%s: failed debugFS registration\n", __func__);
80 +#endif
81 + /* Start the ball rolling... */
82 + pr_debug("%s: DMA RX/TX processes started...\n", dev->name);
83 + priv->hw->dma->start_tx(priv->ioaddr);
84 + priv->hw->dma->start_rx(priv->ioaddr);
85 +
86 + /* Dump DMA/MAC registers */
87 + if (netif_msg_hw(priv)) {
88 + priv->hw->mac->dump_regs(priv->ioaddr);
89 + priv->hw->dma->dump_regs(priv->ioaddr);
90 + }
91 + priv->tx_lpi_timer = STMMAC_DEFAULT_TWT_LS;
92 +
93 + priv->eee_enabled = stmmac_eee_init(priv);
94 +
95 + stmmac_init_tx_coalesce(priv);
96 +
97 + if ((priv->use_riwt) && (priv->hw->dma->rx_watchdog)) {
98 + priv->rx_riwt = MAX_DMA_RIWT;
99 + priv->hw->dma->rx_watchdog(priv->ioaddr, MAX_DMA_RIWT);
100 + }
101 +
102 + if (priv->pcs && priv->hw->mac->ctrl_ane)
103 + priv->hw->mac->ctrl_ane(priv->ioaddr, 0);
104 +
105 + return 0;
106 +}
107 +
108 +/**
109 * stmmac_open - open entry point of the driver
110 * @dev : pointer to the device structure.
111 * Description:
112 @@ -1613,6 +1693,10 @@ static int stmmac_open(struct net_device *dev)
113 }
114 }
115
116 + /* Extra statistics */
117 + memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
118 + priv->xstats.threshold = tc;
119 +
120 /* Create and initialize the TX/RX descriptors chains. */
121 priv->dma_tx_size = STMMAC_ALIGN(dma_txsize);
122 priv->dma_rx_size = STMMAC_ALIGN(dma_rxsize);
123 @@ -1624,28 +1708,14 @@ static int stmmac_open(struct net_device *dev)
124 goto dma_desc_error;
125 }
126
127 - ret = init_dma_desc_rings(dev);
128 + ret = stmmac_hw_setup(dev);
129 if (ret < 0) {
130 - pr_err("%s: DMA descriptors initialization failed\n", __func__);
131 - goto dma_desc_error;
132 - }
133 -
134 - /* DMA initialization and SW reset */
135 - ret = stmmac_init_dma_engine(priv);
136 - if (ret < 0) {
137 - pr_err("%s: DMA engine initialization failed\n", __func__);
138 + pr_err("%s: Hw setup failed\n", __func__);
139 goto init_error;
140 }
141
142 - /* Copy the MAC addr into the HW */
143 - priv->hw->mac->set_umac_addr(priv->ioaddr, dev->dev_addr, 0);
144 -
145 - /* If required, perform hw setup of the bus. */
146 - if (priv->plat->bus_setup)
147 - priv->plat->bus_setup(priv->ioaddr);
148 -
149 - /* Initialize the MAC Core */
150 - priv->hw->mac->core_init(priv->ioaddr);
151 + if (priv->phydev)
152 + phy_start(priv->phydev);
153
154 /* Request the IRQ lines */
155 ret = request_irq(dev->irq, stmmac_interrupt,
156 @@ -1678,55 +1748,6 @@ static int stmmac_open(struct net_device *dev)
157 }
158 }
159
160 - /* Enable the MAC Rx/Tx */
161 - stmmac_set_mac(priv->ioaddr, true);
162 -
163 - /* Set the HW DMA mode and the COE */
164 - stmmac_dma_operation_mode(priv);
165 -
166 - /* Extra statistics */
167 - memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
168 - priv->xstats.threshold = tc;
169 -
170 - stmmac_mmc_setup(priv);
171 -
172 - ret = stmmac_init_ptp(priv);
173 - if (ret)
174 - pr_warn("%s: failed PTP initialisation\n", __func__);
175 -
176 -#ifdef CONFIG_STMMAC_DEBUG_FS
177 - ret = stmmac_init_fs(dev);
178 - if (ret < 0)
179 - pr_warn("%s: failed debugFS registration\n", __func__);
180 -#endif
181 - /* Start the ball rolling... */
182 - pr_debug("%s: DMA RX/TX processes started...\n", dev->name);
183 - priv->hw->dma->start_tx(priv->ioaddr);
184 - priv->hw->dma->start_rx(priv->ioaddr);
185 -
186 - /* Dump DMA/MAC registers */
187 - if (netif_msg_hw(priv)) {
188 - priv->hw->mac->dump_regs(priv->ioaddr);
189 - priv->hw->dma->dump_regs(priv->ioaddr);
190 - }
191 -
192 - if (priv->phydev)
193 - phy_start(priv->phydev);
194 -
195 - priv->tx_lpi_timer = STMMAC_DEFAULT_TWT_LS;
196 -
197 - priv->eee_enabled = stmmac_eee_init(priv);
198 -
199 - stmmac_init_tx_coalesce(priv);
200 -
201 - if ((priv->use_riwt) && (priv->hw->dma->rx_watchdog)) {
202 - priv->rx_riwt = MAX_DMA_RIWT;
203 - priv->hw->dma->rx_watchdog(priv->ioaddr, MAX_DMA_RIWT);
204 - }
205 -
206 - if (priv->pcs && priv->hw->mac->ctrl_ane)
207 - priv->hw->mac->ctrl_ane(priv->ioaddr, 0);
208 -
209 napi_enable(&priv->napi);
210 netif_start_queue(dev);
211
212 --
213 1.8.5.5
214