sunxi: driver refresh for 3.13
[openwrt/svn-archive/archive.git] / target / linux / sunxi / patches-3.13 / 173-3-dt-sun7i-add-mmc.patch
1 From a3bddfdd19c49f0bde7aa2ff496773c575763d07 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?David=20Lanzend=C3=B6rfer?= <david.lanzendoerfer@o2s.ch>
3 Date: Sat, 15 Feb 2014 14:02:01 +0100
4 Subject: [PATCH] ARM: dts: sun7i: Add support for mmc
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
10 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
11 ---
12 arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 8 ++++
13 arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 8 ++++
14 arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 23 ++++++++++
15 arch/arm/boot/dts/sun7i-a20.dtsi | 61 +++++++++++++++++++++++++
16 4 files changed, 100 insertions(+)
17
18 diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
19 index 07823c2..a8186f5 100644
20 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
21 +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
22 @@ -20,6 +20,14 @@
23 compatible = "cubietech,cubieboard2", "allwinner,sun7i-a20";
24
25 soc@01c00000 {
26 + mmc0: mmc@01c0f000 {
27 + pinctrl-names = "default", "default";
28 + pinctrl-0 = <&mmc0_pins_a>;
29 + pinctrl-1 = <&mmc0_cd_pin_reference_design>;
30 + cd-gpios = <&pio 7 1 0>; /* PH1 */
31 + status = "okay";
32 + };
33 +
34 ahci: sata@01c18000 {
35 target-supply = <&reg_ahci_5v>;
36 status = "okay";
37 diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
38 index 403bd2e..6cd7cca 100644
39 diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
40 index d5c6799..d4e2355 100644
41 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
42 +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
43 @@ -20,12 +20,35 @@
44 compatible = "olimex,a20-olinuxino-micro", "allwinner,sun7i-a20";
45
46 soc@01c00000 {
47 + mmc0: mmc@01c0f000 {
48 + pinctrl-names = "default", "default";
49 + pinctrl-0 = <&mmc0_pins_a>;
50 + pinctrl-1 = <&mmc0_cd_pin_reference_design>;
51 + cd-gpios = <&pio 7 1 0>; /* PH1 */
52 + status = "okay";
53 + };
54 +
55 + mmc3: mmc@01c12000 {
56 + pinctrl-names = "default", "default";
57 + pinctrl-0 = <&mmc3_pins_a>;
58 + pinctrl-1 = <&mmc3_cd_pin_olinuxinom>;
59 + cd-gpios = <&pio 7 11 0>; /* PH11 */
60 + status = "okay";
61 + };
62 +
63 ahci: sata@01c18000 {
64 target-supply = <&reg_ahci_5v>;
65 status = "okay";
66 };
67
68 pinctrl@01c20800 {
69 + mmc3_cd_pin_olinuxinom: mmc3_cd_pin@0 {
70 + allwinner,pins = "PH11";
71 + allwinner,function = "gpio_in";
72 + allwinner,drive = <0>;
73 + allwinner,pull = <1>;
74 + };
75 +
76 led_pins_olinuxino: led_pins@0 {
77 allwinner,pins = "PH2";
78 allwinner,function = "gpio_out";
79 diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
80 index 3385994..3bc6ac5 100644
81 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
82 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
83 @@ -392,6 +392,46 @@
84 #size-cells = <0>;
85 };
86
87 + mmc0: mmc@01c0f000 {
88 + compatible = "allwinner,sun5i-a13-mmc";
89 + reg = <0x01c0f000 0x1000>;
90 + clocks = <&ahb_gates 8>, <&mmc0_clk>;
91 + clock-names = "ahb", "mod";
92 + interrupts = <0 32 4>;
93 + bus-width = <4>;
94 + status = "disabled";
95 + };
96 +
97 + mmc1: mmc@01c10000 {
98 + compatible = "allwinner,sun5i-a13-mmc";
99 + reg = <0x01c10000 0x1000>;
100 + clocks = <&ahb_gates 9>, <&mmc1_clk>;
101 + clock-names = "ahb", "mod";
102 + interrupts = <0 33 4>;
103 + bus-width = <4>;
104 + status = "disabled";
105 + };
106 +
107 + mmc2: mmc@01c11000 {
108 + compatible = "allwinner,sun5i-a13-mmc";
109 + reg = <0x01c11000 0x1000>;
110 + clocks = <&ahb_gates 10>, <&mmc2_clk>;
111 + clock-names = "ahb", "mod";
112 + interrupts = <0 34 4>;
113 + bus-width = <4>;
114 + status = "disabled";
115 + };
116 +
117 + mmc3: mmc@01c12000 {
118 + compatible = "allwinner,sun5i-a13-mmc";
119 + reg = <0x01c12000 0x1000>;
120 + clocks = <&ahb_gates 11>, <&mmc3_clk>;
121 + clock-names = "ahb", "mod";
122 + interrupts = <0 35 4>;
123 + bus-width = <4>;
124 + status = "disabled";
125 + };
126 +
127 ahci: sata@01c18000 {
128 compatible = "allwinner,sun4i-a10-ahci";
129 reg = <0x01c18000 0x1000>;
130 @@ -510,6 +550,27 @@
131 allwinner,drive = <3>;
132 allwinner,pull = <0>;
133 };
134 +
135 + mmc0_pins_a: mmc0@0 {
136 + allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
137 + allwinner,function = "mmc0";
138 + allwinner,drive = <3>;
139 + allwinner,pull = <0>;
140 + };
141 +
142 + mmc0_cd_pin_reference_design: mmc0_cd_pin@0 {
143 + allwinner,pins = "PH1";
144 + allwinner,function = "gpio_in";
145 + allwinner,drive = <0>;
146 + allwinner,pull = <1>;
147 + };
148 +
149 + mmc3_pins_a: mmc3@0 {
150 + allwinner,pins = "PI4","PI5","PI6","PI7","PI8","PI9";
151 + allwinner,function = "mmc3";
152 + allwinner,drive = <3>;
153 + allwinner,pull = <0>;
154 + };
155 };
156
157 timer@01c20c00 {
158 --
159 1.8.5.5
160