int bcma_bus_scan(struct bcma_bus *bus);
--- a/drivers/bcma/driver_chipcommon_pmu.c
+++ b/drivers/bcma/driver_chipcommon_pmu.c
-@@ -603,6 +603,7 @@ void bcma_pmu_spuravoid_pllupdate(struct
+@@ -603,6 +603,8 @@ void bcma_pmu_spuravoid_pllupdate(struct
tmp = BCMA_CC_PMU_CTL_PLL_UPD | BCMA_CC_PMU_CTL_NOILPONW;
break;
++ case BCMA_CHIP_ID_BCM43131:
+ case BCMA_CHIP_ID_BCM43217:
case BCMA_CHIP_ID_BCM43227:
case BCMA_CHIP_ID_BCM43228:
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x0576) },
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4313) },
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43224) },
-@@ -280,6 +279,7 @@ static DEFINE_PCI_DEVICE_TABLE(bcma_pci_
+@@ -280,6 +279,8 @@ static DEFINE_PCI_DEVICE_TABLE(bcma_pci_
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4358) },
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4359) },
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4365) },
+ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x43a9) },
++ { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x43aa) },
{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4727) },
{ 0, },
};
SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
SSB_SPROM8_LEDDC_ON_SHIFT);
-@@ -509,6 +534,7 @@ static bool bcma_sprom_onchip_available(
+@@ -509,6 +534,8 @@ static bool bcma_sprom_onchip_available(
/* for these chips OTP is always available */
present = true;
break;
++ case BCMA_CHIP_ID_BCM43131:
+ case BCMA_CHIP_ID_BCM43217:
case BCMA_CHIP_ID_BCM43227:
case BCMA_CHIP_ID_BCM43228:
#include <linux/bcma/bcma_driver_mips.h>
#include <linux/bcma/bcma_driver_gmac_cmn.h>
#include <linux/ssb/ssb.h> /* SPROM sharing */
-@@ -157,6 +158,8 @@ struct bcma_host_ops {
+@@ -72,17 +73,17 @@ struct bcma_host_ops {
+ /* Core-ID values. */
+ #define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */
+ #define BCMA_CORE_4706_CHIPCOMMON 0x500
+-#define BCMA_CORE_PCIEG2 0x501
+-#define BCMA_CORE_DMA 0x502
+-#define BCMA_CORE_SDIO3 0x503
+-#define BCMA_CORE_USB20 0x504
+-#define BCMA_CORE_USB30 0x505
+-#define BCMA_CORE_A9JTAG 0x506
+-#define BCMA_CORE_DDR23 0x507
+-#define BCMA_CORE_ROM 0x508
+-#define BCMA_CORE_NAND 0x509
+-#define BCMA_CORE_QSPI 0x50A
+-#define BCMA_CORE_CHIPCOMMON_B 0x50B
++#define BCMA_CORE_NS_PCIEG2 0x501
++#define BCMA_CORE_NS_DMA 0x502
++#define BCMA_CORE_NS_SDIO3 0x503
++#define BCMA_CORE_NS_USB20 0x504
++#define BCMA_CORE_NS_USB30 0x505
++#define BCMA_CORE_NS_A9JTAG 0x506
++#define BCMA_CORE_NS_DDR23 0x507
++#define BCMA_CORE_NS_ROM 0x508
++#define BCMA_CORE_NS_NAND 0x509
++#define BCMA_CORE_NS_QSPI 0x50A
++#define BCMA_CORE_NS_CHIPCOMMON_B 0x50B
+ #define BCMA_CORE_4706_SOC_RAM 0x50E
+ #define BCMA_CORE_ARMCA9 0x510
+ #define BCMA_CORE_4706_MAC_GBIT 0x52D
+@@ -157,6 +158,9 @@ struct bcma_host_ops {
/* Chip IDs of PCIe devices */
#define BCMA_CHIP_ID_BCM4313 0x4313
#define BCMA_CHIP_ID_BCM43142 43142
++#define BCMA_CHIP_ID_BCM43131 43131
+#define BCMA_CHIP_ID_BCM43217 43217
+#define BCMA_CHIP_ID_BCM43222 43222
#define BCMA_CHIP_ID_BCM43224 43224
#define BCMA_PKG_ID_BCM43224_FAB_CSM 0x8
#define BCMA_PKG_ID_BCM43224_FAB_SMIC 0xa
-@@ -333,6 +336,7 @@ struct bcma_bus {
+@@ -333,6 +337,7 @@ struct bcma_bus {
struct bcma_drv_cc drv_cc;
struct bcma_drv_pci drv_pci[2];
struct bcma_drv_mips drv_mips;
struct bcma_drv_gmac_cmn drv_gmac_cmn;
-@@ -418,7 +422,14 @@ static inline void bcma_maskset16(struct
+@@ -418,7 +423,14 @@ static inline void bcma_maskset16(struct
bcma_write16(cc, offset, (bcma_read16(cc, offset) & mask) | set);
}
+void bcma_core_pcie2_init(struct bcma_drv_pcie2 *pcie2);
+
+#endif /* LINUX_BCMA_DRIVER_PCIE2_H_ */
+--- a/drivers/bcma/scan.c
++++ b/drivers/bcma/scan.c
+@@ -32,17 +32,17 @@ static const struct bcma_device_id_name
+ { BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" },
+ { BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" },
+ { BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" },
+- { BCMA_CORE_PCIEG2, "PCIe Gen 2" },
+- { BCMA_CORE_DMA, "DMA" },
+- { BCMA_CORE_SDIO3, "SDIO3" },
+- { BCMA_CORE_USB20, "USB 2.0" },
+- { BCMA_CORE_USB30, "USB 3.0" },
+- { BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" },
+- { BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" },
+- { BCMA_CORE_ROM, "ROM" },
+- { BCMA_CORE_NAND, "NAND flash controller" },
+- { BCMA_CORE_QSPI, "SPI flash controller" },
+- { BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" },
++ { BCMA_CORE_NS_PCIEG2, "PCIe Gen 2" },
++ { BCMA_CORE_NS_DMA, "DMA" },
++ { BCMA_CORE_NS_SDIO3, "SDIO3" },
++ { BCMA_CORE_NS_USB20, "USB 2.0" },
++ { BCMA_CORE_NS_USB30, "USB 3.0" },
++ { BCMA_CORE_NS_A9JTAG, "ARM Cortex A9 JTAG" },
++ { BCMA_CORE_NS_DDR23, "Denali DDR2/DDR3 memory controller" },
++ { BCMA_CORE_NS_ROM, "ROM" },
++ { BCMA_CORE_NS_NAND, "NAND flash controller" },
++ { BCMA_CORE_NS_QSPI, "SPI flash controller" },
++ { BCMA_CORE_NS_CHIPCOMMON_B, "Chipcommon B" },
+ { BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" },
+ { BCMA_CORE_AMEMC, "AMEMC (DDR)" },
+ { BCMA_CORE_ALTA, "ALTA (I2S)" },