generic: ar8216: allow to specify SGMII config via platform data
authorGabor Juhos <juhosg@openwrt.org>
Thu, 30 May 2013 17:38:26 +0000 (17:38 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Thu, 30 May 2013 17:38:26 +0000 (17:38 +0000)
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
SVN-Revision: 36798

target/linux/generic/files/drivers/net/phy/ar8216.c
target/linux/generic/files/drivers/net/phy/ar8216.h
target/linux/generic/files/include/linux/ar8216_platform.h

index bc36efc3a83d74e0ac2873218a9624303fc034b4..3a696c2986e20a36414248f4020491626e1a0d6c 100644 (file)
@@ -1099,13 +1099,32 @@ ar8327_hw_config_pdata(struct ar8xxx_priv *priv,
                priv->write(priv, AR8327_REG_LED_CTRL1, led_cfg->led_ctrl1);
                priv->write(priv, AR8327_REG_LED_CTRL2, led_cfg->led_ctrl2);
                priv->write(priv, AR8327_REG_LED_CTRL3, led_cfg->led_ctrl3);
+
+               if (new_pos != pos)
+                       new_pos |= AR8327_POWER_ON_STRIP_POWER_ON_SEL;
        }
 
-       if (new_pos != pos) {
-               new_pos |= AR8327_POWER_ON_STRIP_POWER_ON_SEL;
-               priv->write(priv, AR8327_REG_POWER_ON_STRIP, new_pos);
+       if (pdata->sgmii_cfg) {
+               t = pdata->sgmii_cfg->sgmii_ctrl;
+               if (priv->chip_rev == 1)
+                       t |= AR8327_SGMII_CTRL_EN_PLL |
+                            AR8327_SGMII_CTRL_EN_RX |
+                            AR8327_SGMII_CTRL_EN_TX;
+               else
+                       t &= ~(AR8327_SGMII_CTRL_EN_PLL |
+                              AR8327_SGMII_CTRL_EN_RX |
+                              AR8327_SGMII_CTRL_EN_TX);
+
+               priv->write(priv, AR8327_REG_SGMII_CTRL, t);
+
+               if (pdata->sgmii_cfg->serdes_aen)
+                       new_pos &= ~AR8327_POWER_ON_STRIP_SERDES_AEN;
+               else
+                       new_pos |= AR8327_POWER_ON_STRIP_SERDES_AEN;
        }
 
+       priv->write(priv, AR8327_REG_POWER_ON_STRIP, new_pos);
+
        return 0;
 }
 
index 086d58fbab45c729feed3d95e826bc8457ee32b6..ea6d6821c184f062d11734cab15996a2aaf40f19 100644 (file)
 #define AR8327_REG_POWER_ON_STRIP              0x010
 #define   AR8327_POWER_ON_STRIP_POWER_ON_SEL   BIT(31)
 #define   AR8327_POWER_ON_STRIP_LED_OPEN_EN    BIT(24)
+#define   AR8327_POWER_ON_STRIP_SERDES_AEN     BIT(7)
 
 #define AR8327_REG_INT_STATUS0                 0x020
 #define   AR8327_INT0_VT_DONE                  BIT(20)
 #define AR8327_REG_HEADER_CTRL                 0x098
 #define AR8327_REG_PORT_HEADER(_i)             (0x09c + (_i) * 4)
 
+#define AR8327_REG_SGMII_CTRL                  0x0e0
+#define   AR8327_SGMII_CTRL_EN_PLL             BIT(1)
+#define   AR8327_SGMII_CTRL_EN_RX              BIT(2)
+#define   AR8327_SGMII_CTRL_EN_TX              BIT(3)
+
 #define AR8327_REG_PORT_VLAN0(_i)              (0x420 + (_i) * 0x8)
 #define   AR8327_PORT_VLAN0_DEF_SVID           BITS(0, 12)
 #define   AR8327_PORT_VLAN0_DEF_SVID_S         0
index 92e8eda663d0121b847ce4e5a2bde5496b39e905..23cd55b82248121c1cc85fe42c69e9a530f7d17b 100644 (file)
@@ -63,6 +63,11 @@ struct ar8327_port_cfg {
        int duplex:1;
 };
 
+struct ar8327_sgmii_cfg {
+       u32 sgmii_ctrl;
+       bool serdes_aen;
+};
+
 struct ar8327_led_cfg {
        u32 led_ctrl0;
        u32 led_ctrl1;
@@ -75,6 +80,7 @@ struct ar8327_platform_data {
        struct ar8327_pad_cfg *pad0_cfg;
        struct ar8327_pad_cfg *pad5_cfg;
        struct ar8327_pad_cfg *pad6_cfg;
+       struct ar8327_sgmii_cfg *sgmii_cfg;
        struct ar8327_port_cfg port0_cfg;
        struct ar8327_port_cfg port6_cfg;
        struct ar8327_led_cfg *led_cfg;