[xburst] time.c: Timer enable registers are only 8bit width.

SVN-Revision: 20796

diff --git a/target/linux/xburst/files-2.6.32/arch/mips/jz4740/time.c b/target/linux/xburst/files-2.6.32/arch/mips/jz4740/time.c
index d9c5eba61cf88e91eb0dddc08cf34b4b49bb1c17..77fc2012ed211dffcfef70da13771f452bf03985 100644 (file)
--- a/target/linux/xburst/files-2.6.32/arch/mips/jz4740/time.c
+++ b/target/linux/xburst/files-2.6.32/arch/mips/jz4740/time.c
@@ -98,12 +98,12 @@ static void jz4740_init_timer(void)
 static void jz4740_timer_enable(unsigned int timer)
 {
        writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR);
 static void jz4740_timer_enable(unsigned int timer)
 {
        writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_CLEAR);

-       writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_SET);
+       writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_SET);

 }
 
 static void jz4740_timer_disable(unsigned int timer)
 {
 }
 
 static void jz4740_timer_disable(unsigned int timer)
 {

-       writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_CLEAR);
+       writeb(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_ENABLE_CLEAR);

        writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_SET);
 }
 
        writel(BIT(timer), jz4740_timer_base + JZ_REG_TIMER_STOP_SET);
 }