--- /dev/null
+From 396a3529800af0817c6af2eb65c542588a1f7fb7 Mon Sep 17 00:00:00 2001
+From: Gerd Hoffmann <kraxel@redhat.com>
+Date: Mon, 19 Sep 2016 10:43:17 +0200
+Subject: [PATCH] pinctrl: bcm2835: add pull defines to dt bindings
+
+Also delete (unused) private enum from driver.
+The pull defines can be used instead if needed.
+
+Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Acked-by: Linus Walleij <linus.walleij@linaro.org>
+Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
+---
+ drivers/pinctrl/bcm/pinctrl-bcm2835.c | 6 ------
+ include/dt-bindings/pinctrl/bcm2835.h | 5 +++++
+ 2 files changed, 5 insertions(+), 6 deletions(-)
+
+--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
++++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+@@ -76,12 +76,6 @@ enum bcm2835_pinconf_param {
+ BCM2835_PINCONF_PARAM_PULL,
+ };
+
+-enum bcm2835_pinconf_pull {
+- BCM2835_PINCONFIG_PULL_NONE,
+- BCM2835_PINCONFIG_PULL_DOWN,
+- BCM2835_PINCONFIG_PULL_UP,
+-};
+-
+ #define BCM2835_PINCONF_PACK(_param_, _arg_) ((_param_) << 16 | (_arg_))
+ #define BCM2835_PINCONF_UNPACK_PARAM(_conf_) ((_conf_) >> 16)
+ #define BCM2835_PINCONF_UNPACK_ARG(_conf_) ((_conf_) & 0xffff)
+--- a/include/dt-bindings/pinctrl/bcm2835.h
++++ b/include/dt-bindings/pinctrl/bcm2835.h
+@@ -24,4 +24,9 @@
+ #define BCM2835_FSEL_ALT2 6
+ #define BCM2835_FSEL_ALT3 7
+
++/* brcm,pull property */
++#define BCM2835_PUD_OFF 0
++#define BCM2835_PUD_DOWN 1
++#define BCM2835_PUD_UP 2
++
+ #endif /* __DT_BINDINGS_PINCTRL_BCM2835_H__ */
--- /dev/null
+From 21ff843931b2e5a9b628ac56fd0f2e4355890096 Mon Sep 17 00:00:00 2001
+From: Eric Anholt <eric@anholt.net>
+Date: Mon, 19 Sep 2016 10:43:18 +0200
+Subject: [PATCH] ARM: dts: bcm283x: Define standard pinctrl groups in the gpio
+ node.
+
+The BCM2835-ARM-Peripherals.pdf documentation specifies what the
+function selects do for the pins, and there are a bunch of obvious
+groupings to be made. With these created, we'll be able to replace
+bcm2835-rpi.dtsi's main "set all of these pins to alt0" with
+references to specific groups we want enabled.
+
+Also add pinctrl groups for emmc and sdhost.
+
+Based on patches by Eric Anholt, with fixups by Gerd Hoffmann.
+
+Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
+---
+ arch/arm/boot/dts/bcm283x.dtsi | 203 +++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 203 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm283x.dtsi
++++ b/arch/arm/boot/dts/bcm283x.dtsi
+@@ -132,6 +132,209 @@
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
++
++ /* Defines pin muxing groups according to
++ * BCM2835-ARM-Peripherals.pdf page 102.
++ *
++ * While each pin can have its mux selected
++ * for various functions individually, some
++ * groups only make sense to switch to a
++ * particular function together.
++ */
++ dpi_gpio0: dpi_gpio0 {
++ brcm,pins = <0 1 2 3 4 5 6 7 8 9 10 11
++ 12 13 14 15 16 17 18 19
++ 20 21 22 23 24 25 26 27>;
++ brcm,function = <BCM2835_FSEL_ALT2>;
++ };
++ emmc_gpio22: emmc_gpio22 {
++ brcm,pins = <22 23 24 25 26 27>;
++ brcm,function = <BCM2835_FSEL_ALT3>;
++ };
++ emmc_gpio34: emmc_gpio34 {
++ brcm,pins = <34 35 36 37 38 39>;
++ brcm,function = <BCM2835_FSEL_ALT3>;
++ brcm,pull = <BCM2835_PUD_OFF
++ BCM2835_PUD_UP
++ BCM2835_PUD_UP
++ BCM2835_PUD_UP
++ BCM2835_PUD_UP
++ BCM2835_PUD_UP>;
++ };
++ emmc_gpio48: emmc_gpio48 {
++ brcm,pins = <48 49 50 51 52 53>;
++ brcm,function = <BCM2835_FSEL_ALT3>;
++ };
++
++ gpclk0_gpio4: gpclk0_gpio4 {
++ brcm,pins = <4>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++ gpclk1_gpio5: gpclk1_gpio5 {
++ brcm,pins = <5>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++ gpclk1_gpio42: gpclk1_gpio42 {
++ brcm,pins = <42>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++ gpclk1_gpio44: gpclk1_gpio44 {
++ brcm,pins = <44>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++ gpclk2_gpio6: gpclk2_gpio6 {
++ brcm,pins = <6>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++ gpclk2_gpio43: gpclk2_gpio43 {
++ brcm,pins = <43>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++
++ i2c0_gpio0: i2c0_gpio0 {
++ brcm,pins = <0 1>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++ i2c0_gpio32: i2c0_gpio32 {
++ brcm,pins = <32 34>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++ i2c0_gpio44: i2c0_gpio44 {
++ brcm,pins = <44 45>;
++ brcm,function = <BCM2835_FSEL_ALT1>;
++ };
++ i2c1_gpio2: i2c1_gpio2 {
++ brcm,pins = <2 3>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++ i2c1_gpio44: i2c1_gpio44 {
++ brcm,pins = <44 45>;
++ brcm,function = <BCM2835_FSEL_ALT2>;
++ };
++ i2c_slave_gpio18: i2c_slave_gpio18 {
++ brcm,pins = <18 19 20 21>;
++ brcm,function = <BCM2835_FSEL_ALT3>;
++ };
++
++ jtag_gpio4: jtag_gpio4 {
++ brcm,pins = <4 5 6 12 13>;
++ brcm,function = <BCM2835_FSEL_ALT4>;
++ };
++ jtag_gpio22: jtag_gpio22 {
++ brcm,pins = <22 23 24 25 26 27>;
++ brcm,function = <BCM2835_FSEL_ALT4>;
++ };
++
++ pcm_gpio18: pcm_gpio18 {
++ brcm,pins = <18 19 20 21>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++ pcm_gpio28: pcm_gpio28 {
++ brcm,pins = <28 29 30 31>;
++ brcm,function = <BCM2835_FSEL_ALT2>;
++ };
++
++ pwm0_gpio12: pwm0_gpio12 {
++ brcm,pins = <12>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++ pwm0_gpio18: pwm0_gpio18 {
++ brcm,pins = <18>;
++ brcm,function = <BCM2835_FSEL_ALT5>;
++ };
++ pwm0_gpio40: pwm0_gpio40 {
++ brcm,pins = <40>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++ pwm1_gpio13: pwm1_gpio13 {
++ brcm,pins = <13>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++ pwm1_gpio19: pwm1_gpio19 {
++ brcm,pins = <19>;
++ brcm,function = <BCM2835_FSEL_ALT5>;
++ };
++ pwm1_gpio41: pwm1_gpio41 {
++ brcm,pins = <41>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++ pwm1_gpio45: pwm1_gpio45 {
++ brcm,pins = <45>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++
++ sdhost_gpio48: sdhost_gpio48 {
++ brcm,pins = <48 49 50 51 52 53>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++
++ spi0_gpio7: spi0_gpio7 {
++ brcm,pins = <7 8 9 10 11>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++ spi0_gpio35: spi0_gpio35 {
++ brcm,pins = <35 36 37 38 39>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++ spi1_gpio16: spi1_gpio16 {
++ brcm,pins = <16 17 18 19 20 21>;
++ brcm,function = <BCM2835_FSEL_ALT4>;
++ };
++ spi2_gpio40: spi2_gpio40 {
++ brcm,pins = <40 41 42 43 44 45>;
++ brcm,function = <BCM2835_FSEL_ALT4>;
++ };
++
++ uart0_gpio14: uart0_gpio14 {
++ brcm,pins = <14 15>;
++ brcm,function = <BCM2835_FSEL_ALT0>;
++ };
++ /* Separate from the uart0_gpio14 group
++ * because it conflicts with spi1_gpio16, and
++ * people often run uart0 on the two pins
++ * without flow contrl.
++ */
++ uart0_ctsrts_gpio16: uart0_ctsrts_gpio16 {
++ brcm,pins = <16 17>;
++ brcm,function = <BCM2835_FSEL_ALT3>;
++ };
++ uart0_gpio30: uart0_gpio30 {
++ brcm,pins = <30 31>;
++ brcm,function = <BCM2835_FSEL_ALT3>;
++ };
++ uart0_ctsrts_gpio32: uart0_ctsrts_gpio32 {
++ brcm,pins = <32 33>;
++ brcm,function = <BCM2835_FSEL_ALT3>;
++ };
++
++ uart1_gpio14: uart1_gpio14 {
++ brcm,pins = <14 15>;
++ brcm,function = <BCM2835_FSEL_ALT5>;
++ };
++ uart1_ctsrts_gpio16: uart1_ctsrts_gpio16 {
++ brcm,pins = <16 17>;
++ brcm,function = <BCM2835_FSEL_ALT5>;
++ };
++ uart1_gpio32: uart1_gpio32 {
++ brcm,pins = <32 33>;
++ brcm,function = <BCM2835_FSEL_ALT5>;
++ };
++ uart1_ctsrts_gpio30: uart1_ctsrts_gpio30 {
++ brcm,pins = <30 31>;
++ brcm,function = <BCM2835_FSEL_ALT5>;
++ };
++ uart1_gpio36: uart1_gpio36 {
++ brcm,pins = <36 37 38 39>;
++ brcm,function = <BCM2835_FSEL_ALT2>;
++ };
++ uart1_gpio40: uart1_gpio40 {
++ brcm,pins = <40 41>;
++ brcm,function = <BCM2835_FSEL_ALT5>;
++ };
++ uart1_ctsrts_gpio42: uart1_ctsrts_gpio42 {
++ brcm,pins = <42 43>;
++ brcm,function = <BCM2835_FSEL_ALT5>;
++ };
+ };
+
+ uart0: serial@7e201000 {
--- /dev/null
+From 14e0ea34058ce13794877206f05a6ab5034e147b Mon Sep 17 00:00:00 2001
+From: Gerd Hoffmann <kraxel@redhat.com>
+Date: Mon, 19 Sep 2016 10:43:19 +0200
+Subject: [PATCH] ARM: dts: bcm283x: add pinctrl group to &pwm, drop pins from
+ &gpio
+
+Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
+---
+ arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
+@@ -39,7 +39,7 @@
+ };
+
+ alt0: alt0 {
+- brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 14 15 40 45>;
++ brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 14 15>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+
+@@ -69,6 +69,8 @@
+ };
+
+ &pwm {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pwm0_gpio40 &pwm1_gpio45>;
+ status = "okay";
+ };
+
--- /dev/null
+From e6e199712008374edb4de979e74ae5acb1f40845 Mon Sep 17 00:00:00 2001
+From: Gerd Hoffmann <kraxel@redhat.com>
+Date: Mon, 19 Sep 2016 10:43:20 +0200
+Subject: [PATCH] ARM: dts: bcm283x: add pinctrl group to &i2c0, drop pins from
+ &gpio
+
+Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
+---
+ arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
+@@ -39,7 +39,7 @@
+ };
+
+ alt0: alt0 {
+- brcm,pins = <0 1 2 3 4 5 7 8 9 10 11 14 15>;
++ brcm,pins = <2 3 4 5 7 8 9 10 11 14 15>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+
+@@ -50,6 +50,8 @@
+ };
+
+ &i2c0 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c0_gpio0>;
+ status = "okay";
+ clock-frequency = <100000>;
+ };
--- /dev/null
+From 4eb65cbfa721db9d7bbe2f76e8b1909fa0320273 Mon Sep 17 00:00:00 2001
+From: Gerd Hoffmann <kraxel@redhat.com>
+Date: Mon, 19 Sep 2016 10:43:21 +0200
+Subject: [PATCH] ARM: dts: bcm283x: add pinctrl group to &i2c1, drop pins from
+ &gpio
+
+Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
+@@ -39,7 +39,7 @@
+ };
+
+ alt0: alt0 {
+- brcm,pins = <2 3 4 5 7 8 9 10 11 14 15>;
++ brcm,pins = <4 5 7 8 9 10 11 14 15>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+
+@@ -57,6 +57,8 @@
+ };
+
+ &i2c1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&i2c1_gpio2>;
+ status = "okay";
+ clock-frequency = <100000>;
+ };
--- /dev/null
+From f8bef3619bb219ed27dfe11cd20547e5b709650a Mon Sep 17 00:00:00 2001
+From: Gerd Hoffmann <kraxel@redhat.com>
+Date: Mon, 19 Sep 2016 10:43:22 +0200
+Subject: [PATCH] ARM: dts: bcm283x: add pinctrl group to &sdhci, drop pins
+ from &gpio
+
+Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
+---
+ arch/arm/boot/dts/bcm2835-rpi.dtsi | 4 +++-
+ 1 file changed, 3 insertions(+), 1 deletion(-)
+
+--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
+@@ -44,7 +44,7 @@
+ };
+
+ alt3: alt3 {
+- brcm,pins = <48 49 50 51 52 53>;
++ brcm,pins = <>;
+ brcm,function = <BCM2835_FSEL_ALT3>;
+ };
+ };
+@@ -68,6 +68,8 @@
+ };
+
+ &sdhci {
++ pinctrl-names = "default";
++ pinctrl-0 = <&emmc_gpio48>;
+ status = "okay";
+ bus-width = <4>;
+ };
--- /dev/null
+From a6d962aeb22fbf73c023334bdf55dc45c9fd7dba Mon Sep 17 00:00:00 2001
+From: Gerd Hoffmann <kraxel@redhat.com>
+Date: Mon, 19 Sep 2016 10:43:23 +0200
+Subject: [PATCH] ARM: dts: bcm283x: drop alt3 from &gpio
+
+As the alt3 group has no pins left drop it from &gpio.
+
+Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
+---
+ arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 2 +-
+ arch/arm/boot/dts/bcm2835-rpi-a.dts | 2 +-
+ arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 2 +-
+ arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 2 +-
+ arch/arm/boot/dts/bcm2835-rpi-b.dts | 2 +-
+ arch/arm/boot/dts/bcm2835-rpi-zero.dts | 2 +-
+ arch/arm/boot/dts/bcm2835-rpi.dtsi | 5 -----
+ arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 2 +-
+ 8 files changed, 7 insertions(+), 12 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
+@@ -22,7 +22,7 @@
+ };
+
+ &gpio {
+- pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
++ pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
+
+ /* I2S interface */
+ i2s_alt0: i2s_alt0 {
+--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
+@@ -15,7 +15,7 @@
+ };
+
+ &gpio {
+- pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>;
++ pinctrl-0 = <&gpioout &alt0 &i2s_alt2>;
+
+ /* I2S interface */
+ i2s_alt2: i2s_alt2 {
+--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
+@@ -23,7 +23,7 @@
+ };
+
+ &gpio {
+- pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
++ pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
+
+ /* I2S interface */
+ i2s_alt0: i2s_alt0 {
+--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
+@@ -16,7 +16,7 @@
+ };
+
+ &gpio {
+- pinctrl-0 = <&gpioout &alt0 &i2s_alt2 &alt3>;
++ pinctrl-0 = <&gpioout &alt0 &i2s_alt2>;
+
+ /* I2S interface */
+ i2s_alt2: i2s_alt2 {
+--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
+@@ -16,7 +16,7 @@
+ };
+
+ &gpio {
+- pinctrl-0 = <&gpioout &alt0 &alt3>;
++ pinctrl-0 = <&gpioout &alt0>;
+ };
+
+ &hdmi {
+--- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
+@@ -26,7 +26,7 @@
+ };
+
+ &gpio {
+- pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
++ pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
+
+ /* I2S interface */
+ i2s_alt0: i2s_alt0 {
+--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
+@@ -42,11 +42,6 @@
+ brcm,pins = <4 5 7 8 9 10 11 14 15>;
+ brcm,function = <BCM2835_FSEL_ALT0>;
+ };
+-
+- alt3: alt3 {
+- brcm,pins = <>;
+- brcm,function = <BCM2835_FSEL_ALT3>;
+- };
+ };
+
+ &i2c0 {
+--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
++++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
+@@ -27,7 +27,7 @@
+ };
+
+ &gpio {
+- pinctrl-0 = <&gpioout &alt0 &i2s_alt0 &alt3>;
++ pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
+
+ /* I2S interface */
+ i2s_alt0: i2s_alt0 {
--- /dev/null
+From 43bac4133f405b67857e4c985aecc44a57233bfe Mon Sep 17 00:00:00 2001
+From: Martin Sperl <kernel@martin.sperl.org>
+Date: Wed, 2 Nov 2016 10:18:23 +0000
+Subject: [PATCH] ARM: bcm2835: dts: add thermal node to device-tree of bcm283x
+
+Add the node for the thermal sensor of the bcm2835-soc
+to the device tree.
+
+Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
+Reviewed-by: Eric Anholt <eric@anholt.net>
+Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
+
+Changelog:
+V1 -> V5: generic settings is shared in bcm283x.dtsi, but disabled
+ moved the compatible string to the SOC specific dtsi
+ for arm and arm64
+V5 -> V6: fix remove 0x prefix from thermal@0x7e212000
+
+Note: there is no arm/boot/dts/bcm2837.dtsi as of now,
+ so the 32-bit rpi3 dt is not modified.
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm2835.dtsi | 6 ++++++
+ arch/arm/boot/dts/bcm2836.dtsi | 6 ++++++
+ arch/arm/boot/dts/bcm283x.dtsi | 7 +++++++
+ 3 files changed, 19 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm2835.dtsi
++++ b/arch/arm/boot/dts/bcm2835.dtsi
+@@ -23,3 +23,9 @@
+ };
+ };
+ };
++
++/* enable thermal sensor with the correct compatible property set */
++&thermal {
++ compatible = "brcm,bcm2835-thermal";
++ status = "okay";
++};
+--- a/arch/arm/boot/dts/bcm2836.dtsi
++++ b/arch/arm/boot/dts/bcm2836.dtsi
+@@ -76,3 +76,9 @@
+ interrupt-parent = <&local_intc>;
+ interrupts = <8>;
+ };
++
++/* enable thermal sensor with the correct compatible property set */
++&thermal {
++ compatible = "brcm,bcm2836-thermal";
++ status = "okay";
++};
+--- a/arch/arm/boot/dts/bcm283x.dtsi
++++ b/arch/arm/boot/dts/bcm283x.dtsi
+@@ -390,6 +390,13 @@
+ interrupts = <2 14>; /* pwa1 */
+ };
+
++ thermal: thermal@7e212000 {
++ compatible = "brcm,bcm2835-thermal";
++ reg = <0x7e212000 0x8>;
++ clocks = <&clocks BCM2835_CLOCK_TSENS>;
++ status = "disabled";
++ };
++
+ aux: aux@0x7e215000 {
+ compatible = "brcm,bcm2835-aux";
+ #clock-cells = <1>;
--- /dev/null
+From 731b26a6ac17f24057c559361c6d0cb7cb79baed Mon Sep 17 00:00:00 2001
+From: Linus Walleij <linus.walleij@linaro.org>
+Date: Thu, 6 Oct 2016 13:15:02 +0200
+Subject: [PATCH] ARM: bcm2835: Add names for the Raspberry Pi GPIO lines
+
+The idea is to give useful names to GPIO lines that an implementer
+will be using from userspace, e.g. for maker type projects. These are
+user-visible using tools/gpio/lsgpio.c
+
+v2: Major rewrite by anholt: Flatten each GPIO line to a line in the
+ file for better diffing, prefix all expansion header pins with
+ "P<number>" or "P5HEADER_P<number>" and drop the mostly-unused
+ GPIO_GEN<smallnumber> names in favor of GPIO<socgpionumber>, fix
+ extra '[]' on a couple of lines, fix locations of SD_CARD_DETECT,
+ CAM_GPIO and STATUS_LED, fix HDMI_HPD polarities, rewrite A+ using
+ unreleased schematics.
+
+v3: More changes by anholt: Drop P<number> / P5HEADER<number>
+ prefixes. I had been skeptical about adding them, and was
+ convinced to drop them by Gottfried (who probably has more
+ experience with GPIOs in educational contexts than the rest of
+ us). Also drop [] brackets for "is pinmuxed", which didn't seem
+ to clarify, and were ambiguous for things like the SPI_*-labeled
+ pins which may or may not actually be pinmuxed to SPI.
+
+v4: Rename B+'s SDA0/SCL0 to match the other boards, despite the
+ naming on its schematic.
+
+Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 65 +++++++++++++++++++++++++++++++
+ arch/arm/boot/dts/bcm2835-rpi-a.dts | 67 ++++++++++++++++++++++++++++++++
+ arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 66 +++++++++++++++++++++++++++++++
+ arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 66 +++++++++++++++++++++++++++++++
+ arch/arm/boot/dts/bcm2835-rpi-b.dts | 67 ++++++++++++++++++++++++++++++++
+ 5 files changed, 331 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
+@@ -22,6 +22,71 @@
+ };
+
+ &gpio {
++ /*
++ * This is based on the unreleased schematic for the Model A+.
++ *
++ * Legend:
++ * "NC" = not connected (no rail from the SoC)
++ * "FOO" = GPIO line named "FOO" on the schematic
++ * "FOO_N" = GPIO line named "FOO" on schematic, active low
++ */
++ gpio-line-names = "SDA0",
++ "SCL0",
++ "SDA1",
++ "SCL1",
++ "GPIO_GCLK",
++ "GPIO5",
++ "GPIO6",
++ "SPI_CE1_N",
++ "SPI_CE0_N",
++ "SPI_MISO",
++ "SPI_MOSI",
++ "SPI_SCLK",
++ "GPIO12",
++ "GPIO13",
++ /* Serial port */
++ "TXD0",
++ "RXD0",
++ "GPIO16",
++ "GPIO17",
++ "GPIO18",
++ "GPIO19",
++ "GPIO20",
++ "GPIO21",
++ "GPIO22",
++ "GPIO23",
++ "GPIO24",
++ "GPIO25",
++ "GPIO26",
++ "GPIO27",
++ "SDA0",
++ "SCL0",
++ "NC", /* GPIO30 */
++ "NC", /* GPIO31 */
++ "NC", /* GPIO32 */
++ "NC", /* GPIO33 */
++ "NC", /* GPIO34 */
++ "PWR_LOW_N", /* GPIO35 */
++ "NC", /* GPIO36 */
++ "NC", /* GPIO37 */
++ "NC", /* GPIO38 */
++ "NC", /* GPIO39 */
++ "PWM0_OUT", /* GPIO40 */
++ "CAM_GPIO0", /* GPIO41 */
++ "NC", /* GPIO42 */
++ "NC", /* GPIO43 */
++ "NC", /* GPIO44 */
++ "PWM1_OUT", /* GPIO45 */
++ "HDMI_HPD_N",
++ "STATUS_LED",
++ /* Used by SD Card */
++ "SD_CLK_R",
++ "SD_CMD_R",
++ "SD_DATA0_R",
++ "SD_DATA1_R",
++ "SD_DATA2_R",
++ "SD_DATA3_R";
++
+ pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
+
+ /* I2S interface */
+--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
+@@ -15,6 +15,73 @@
+ };
+
+ &gpio {
++ /*
++ * Taken from Raspberry-Pi-Rev-1.0-Model-AB-Schematics.pdf
++ * RPI00021 sheet 02
++ *
++ * Legend:
++ * "NC" = not connected (no rail from the SoC)
++ * "FOO" = GPIO line named "FOO" on the schematic
++ * "FOO_N" = GPIO line named "FOO" on schematic, active low
++ */
++ gpio-line-names = "SDA0",
++ "SCL0",
++ "SDA1",
++ "SCL1",
++ "GPIO_GCLK",
++ "CAM_CLK",
++ "LAN_RUN",
++ "SPI_CE1_N",
++ "SPI_CE0_N",
++ "SPI_MISO",
++ "SPI_MOSI",
++ "SPI_SCLK",
++ "NC", /* GPIO12 */
++ "NC", /* GPIO13 */
++ /* Serial port */
++ "TXD0",
++ "RXD0",
++ "STATUS_LED_N",
++ "GPIO17",
++ "GPIO18",
++ "NC", /* GPIO19 */
++ "NC", /* GPIO20 */
++ "GPIO21",
++ "GPIO22",
++ "GPIO23",
++ "GPIO24",
++ "GPIO25",
++ "NC", /* GPIO26 */
++ "CAM_GPIO",
++ /* Binary number representing build/revision */
++ "CONFIG0",
++ "CONFIG1",
++ "CONFIG2",
++ "CONFIG3",
++ "NC", /* GPIO32 */
++ "NC", /* GPIO33 */
++ "NC", /* GPIO34 */
++ "NC", /* GPIO35 */
++ "NC", /* GPIO36 */
++ "NC", /* GPIO37 */
++ "NC", /* GPIO38 */
++ "NC", /* GPIO39 */
++ "PWM0_OUT",
++ "NC", /* GPIO41 */
++ "NC", /* GPIO42 */
++ "NC", /* GPIO43 */
++ "NC", /* GPIO44 */
++ "PWM1_OUT",
++ "HDMI_HPD_P",
++ "SD_CARD_DET",
++ /* Used by SD Card */
++ "SD_CLK_R",
++ "SD_CMD_R",
++ "SD_DATA0_R",
++ "SD_DATA1_R",
++ "SD_DATA2_R",
++ "SD_DATA3_R";
++
+ pinctrl-0 = <&gpioout &alt0 &i2s_alt2>;
+
+ /* I2S interface */
+--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
+@@ -23,6 +23,72 @@
+ };
+
+ &gpio {
++ /*
++ * Taken from Raspberry-Pi-B-Plus-V1.2-Schematics.pdf
++ * RPI-BPLUS sheet 1
++ *
++ * Legend:
++ * "NC" = not connected (no rail from the SoC)
++ * "FOO" = GPIO line named "FOO" on the schematic
++ * "FOO_N" = GPIO line named "FOO" on schematic, active low
++ */
++ gpio-line-names = "SDA0",
++ "SCL0",
++ "SDA1",
++ "SCL1",
++ "GPIO_GCLK",
++ "GPIO5",
++ "GPIO6",
++ "SPI_CE1_N",
++ "SPI_CE0_N",
++ "SPI_MISO",
++ "SPI_MOSI",
++ "SPI_SCLK",
++ "GPIO12",
++ "GPIO13",
++ /* Serial port */
++ "TXD0",
++ "RXD0",
++ "GPIO16",
++ "GPIO17",
++ "GPIO18",
++ "GPIO19",
++ "GPIO20",
++ "GPIO21",
++ "GPIO22",
++ "GPIO23",
++ "GPIO24",
++ "GPIO25",
++ "GPIO26",
++ "GPIO27",
++ "SDA0",
++ "SCL0",
++ "NC", /* GPIO30 */
++ "LAN_RUN", /* GPIO31 */
++ "CAM_GPIO1", /* GPIO32 */
++ "NC", /* GPIO33 */
++ "NC", /* GPIO34 */
++ "PWR_LOW_N", /* GPIO35 */
++ "NC", /* GPIO36 */
++ "NC", /* GPIO37 */
++ "NC", /* GPIO38 */
++ "NC", /* GPIO39 */
++ "PWM0_OUT", /* GPIO40 */
++ "CAM_GPIO0", /* GPIO41 */
++ "NC", /* GPIO42 */
++ "NC", /* GPIO43 */
++ "ETHCLK", /* GPIO44 */
++ "PWM1_OUT", /* GPIO45 */
++ "HDMI_HPD_N",
++ "STATUS_LED",
++ /* Used by SD Card */
++ "SD_CLK_R",
++ "SD_CMD_R",
++ "SD_DATA0_R",
++ "SD_DATA1_R",
++ "SD_DATA2_R",
++ "SD_DATA3_R";
++
+ pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
+
+ /* I2S interface */
+--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
+@@ -16,6 +16,72 @@
+ };
+
+ &gpio {
++ /*
++ * Taken from Raspberry-Pi-Rev-2.0-Model-AB-Schematics.pdf
++ * RPI00022 sheet 02
++ *
++ * Legend:
++ * "NC" = not connected (no rail from the SoC)
++ * "FOO" = GPIO line named "FOO" on the schematic
++ * "FOO_N" = GPIO line named "FOO" on schematic, active low
++ */
++ gpio-line-names = "SDA0",
++ "SCL0",
++ "SDA1",
++ "SCL1",
++ "GPIO_GCLK",
++ "CAM_CLK",
++ "LAN_RUN",
++ "SPI_CE1_N",
++ "SPI_CE0_N",
++ "SPI_MISO",
++ "SPI_MOSI",
++ "SPI_SCLK",
++ "NC", /* GPIO12 */
++ "NC", /* GPIO13 */
++ /* Serial port */
++ "TXD0",
++ "RXD0",
++ "STATUS_LED_N",
++ "GPIO17",
++ "GPIO18",
++ "NC", /* GPIO19 */
++ "NC", /* GPIO20 */
++ "CAM_GPIO",
++ "GPIO22",
++ "GPIO23",
++ "GPIO24",
++ "GPIO25",
++ "NC", /* GPIO26 */
++ "GPIO27",
++ "GPIO28",
++ "GPIO29",
++ "GPIO30",
++ "GPIO31",
++ "NC", /* GPIO32 */
++ "NC", /* GPIO33 */
++ "NC", /* GPIO34 */
++ "NC", /* GPIO35 */
++ "NC", /* GPIO36 */
++ "NC", /* GPIO37 */
++ "NC", /* GPIO38 */
++ "NC", /* GPIO39 */
++ "PWM0_OUT",
++ "NC", /* GPIO41 */
++ "NC", /* GPIO42 */
++ "NC", /* GPIO43 */
++ "NC", /* GPIO44 */
++ "PWM1_OUT",
++ "HDMI_HPD_P",
++ "SD_CARD_DET",
++ /* Used by SD Card */
++ "SD_CLK_R",
++ "SD_CMD_R",
++ "SD_DATA0_R",
++ "SD_DATA1_R",
++ "SD_DATA2_R",
++ "SD_DATA3_R";
++
+ pinctrl-0 = <&gpioout &alt0 &i2s_alt2>;
+
+ /* I2S interface */
+--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
+@@ -16,6 +16,73 @@
+ };
+
+ &gpio {
++ /*
++ * Taken from Raspberry-Pi-Rev-1.0-Model-AB-Schematics.pdf
++ * RPI00021 sheet 02
++ *
++ * Legend:
++ * "NC" = not connected (no rail from the SoC)
++ * "FOO" = GPIO line named "FOO" on the schematic
++ * "FOO_N" = GPIO line named "FOO" on schematic, active low
++ */
++ gpio-line-names = "SDA0",
++ "SCL0",
++ "SDA1",
++ "SCL1",
++ "GPIO_GCLK",
++ "CAM_CLK",
++ "LAN_RUN",
++ "SPI_CE1_N",
++ "SPI_CE0_N",
++ "SPI_MISO",
++ "SPI_MOSI",
++ "SPI_SCLK",
++ "NC", /* GPIO12 */
++ "NC", /* GPIO13 */
++ /* Serial port */
++ "TXD0",
++ "RXD0",
++ "STATUS_LED_N",
++ "GPIO17",
++ "GPIO18",
++ "NC", /* GPIO19 */
++ "NC", /* GPIO20 */
++ "GPIO21",
++ "GPIO22",
++ "GPIO23",
++ "GPIO24",
++ "GPIO25",
++ "NC", /* GPIO26 */
++ "CAM_GPIO",
++ /* Binary number representing build/revision */
++ "CONFIG0",
++ "CONFIG1",
++ "CONFIG2",
++ "CONFIG3",
++ "NC", /* GPIO32 */
++ "NC", /* GPIO33 */
++ "NC", /* GPIO34 */
++ "NC", /* GPIO35 */
++ "NC", /* GPIO36 */
++ "NC", /* GPIO37 */
++ "NC", /* GPIO38 */
++ "NC", /* GPIO39 */
++ "PWM0_OUT",
++ "NC", /* GPIO41 */
++ "NC", /* GPIO42 */
++ "NC", /* GPIO43 */
++ "NC", /* GPIO44 */
++ "PWM1_OUT",
++ "HDMI_HPD_P",
++ "SD_CARD_DET",
++ /* Used by SD Card */
++ "SD_CLK_R",
++ "SD_CMD_R",
++ "SD_DATA0_R",
++ "SD_DATA1_R",
++ "SD_DATA2_R",
++ "SD_DATA3_R";
++
+ pinctrl-0 = <&gpioout &alt0>;
+ };
+
--- /dev/null
+From 6b9170887e1b912b657dab4597f8b44ae4dbdf50 Mon Sep 17 00:00:00 2001
+From: Stefan Wahren <stefan.wahren@i2se.com>
+Date: Wed, 16 Nov 2016 17:52:06 +0000
+Subject: [PATCH] ARM: bcm2835: Fix names for the Raspberry Pi GPIO lines
+
+There are some differences between the schematics and the official firmware
+DTS [1]. So based on these additional information the following has been
+changed:
+
+* use consistent "CAM_GPIO1" for camera LED
+* use consistent "CAM_GPIO0" for camera shutdown
+* add "USB_LIMIT" for USB current limit (0=600mA, 1=1200mA)
+
+[1] - https://github.com/raspberrypi/firmware/blob/master/extra/dt-blob.dts
+
+Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 4 ++--
+ arch/arm/boot/dts/bcm2835-rpi-a.dts | 4 ++--
+ arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 2 +-
+ arch/arm/boot/dts/bcm2835-rpi-b.dts | 4 ++--
+ 4 files changed, 7 insertions(+), 7 deletions(-)
+
+--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
+@@ -63,13 +63,13 @@
+ "SCL0",
+ "NC", /* GPIO30 */
+ "NC", /* GPIO31 */
+- "NC", /* GPIO32 */
++ "CAM_GPIO1", /* GPIO32 */
+ "NC", /* GPIO33 */
+ "NC", /* GPIO34 */
+ "PWR_LOW_N", /* GPIO35 */
+ "NC", /* GPIO36 */
+ "NC", /* GPIO37 */
+- "NC", /* GPIO38 */
++ "USB_LIMIT", /* GPIO38 */
+ "NC", /* GPIO39 */
+ "PWM0_OUT", /* GPIO40 */
+ "CAM_GPIO0", /* GPIO41 */
+--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
+@@ -29,7 +29,7 @@
+ "SDA1",
+ "SCL1",
+ "GPIO_GCLK",
+- "CAM_CLK",
++ "CAM_GPIO1",
+ "LAN_RUN",
+ "SPI_CE1_N",
+ "SPI_CE0_N",
+@@ -52,7 +52,7 @@
+ "GPIO24",
+ "GPIO25",
+ "NC", /* GPIO26 */
+- "CAM_GPIO",
++ "CAM_GPIO0",
+ /* Binary number representing build/revision */
+ "CONFIG0",
+ "CONFIG1",
+--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
+@@ -71,7 +71,7 @@
+ "PWR_LOW_N", /* GPIO35 */
+ "NC", /* GPIO36 */
+ "NC", /* GPIO37 */
+- "NC", /* GPIO38 */
++ "USB_LIMIT", /* GPIO38 */
+ "NC", /* GPIO39 */
+ "PWM0_OUT", /* GPIO40 */
+ "CAM_GPIO0", /* GPIO41 */
+--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
+@@ -30,7 +30,7 @@
+ "SDA1",
+ "SCL1",
+ "GPIO_GCLK",
+- "CAM_CLK",
++ "CAM_GPIO1",
+ "LAN_RUN",
+ "SPI_CE1_N",
+ "SPI_CE0_N",
+@@ -53,7 +53,7 @@
+ "GPIO24",
+ "GPIO25",
+ "NC", /* GPIO26 */
+- "CAM_GPIO",
++ "CAM_GPIO0",
+ /* Binary number representing build/revision */
+ "CONFIG0",
+ "CONFIG1",
--- /dev/null
+From 3a1689ea752436917c5ce4487527ed6c444630ee Mon Sep 17 00:00:00 2001
+From: Stefan Wahren <stefan.wahren@i2se.com>
+Date: Wed, 16 Nov 2016 17:52:07 +0000
+Subject: [PATCH] ARM: bcm2835: Add names for the RPi Zero GPIO lines
+
+This adds the GPIO names for the Raspberry Pi Zero. The GPIO lines
+of the RPi Zero are almost identical to the Model A+ except:
+
+* GPIO 35, 38, 40 and 45 are not connected
+* Status LED is active low
+
+Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm2835-rpi-zero.dts | 65 ++++++++++++++++++++++++++++++++++
+ 1 file changed, 65 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts
++++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
+@@ -26,6 +26,71 @@
+ };
+
+ &gpio {
++ /*
++ * This is based on the official GPU firmware DT blob.
++ *
++ * Legend:
++ * "NC" = not connected (no rail from the SoC)
++ * "FOO" = GPIO line named "FOO" on the schematic
++ * "FOO_N" = GPIO line named "FOO" on schematic, active low
++ */
++ gpio-line-names = "SDA0",
++ "SCL0",
++ "SDA1",
++ "SCL1",
++ "GPIO_GCLK",
++ "GPIO5",
++ "GPIO6",
++ "SPI_CE1_N",
++ "SPI_CE0_N",
++ "SPI_MISO",
++ "SPI_MOSI",
++ "SPI_SCLK",
++ "GPIO12",
++ "GPIO13",
++ /* Serial port */
++ "TXD0",
++ "RXD0",
++ "GPIO16",
++ "GPIO17",
++ "GPIO18",
++ "GPIO19",
++ "GPIO20",
++ "GPIO21",
++ "GPIO22",
++ "GPIO23",
++ "GPIO24",
++ "GPIO25",
++ "GPIO26",
++ "GPIO27",
++ "SDA0",
++ "SCL0",
++ "NC", /* GPIO30 */
++ "NC", /* GPIO31 */
++ "CAM_GPIO1", /* GPIO32 */
++ "NC", /* GPIO33 */
++ "NC", /* GPIO34 */
++ "NC", /* GPIO35 */
++ "NC", /* GPIO36 */
++ "NC", /* GPIO37 */
++ "NC", /* GPIO38 */
++ "NC", /* GPIO39 */
++ "NC", /* GPIO40 */
++ "CAM_GPIO0", /* GPIO41 */
++ "NC", /* GPIO42 */
++ "NC", /* GPIO43 */
++ "NC", /* GPIO44 */
++ "NC", /* GPIO45 */
++ "HDMI_HPD_N",
++ "STATUS_LED_N",
++ /* Used by SD Card */
++ "SD_CLK_R",
++ "SD_CMD_R",
++ "SD_DATA0_R",
++ "SD_DATA1_R",
++ "SD_DATA2_R",
++ "SD_DATA3_R";
++
+ pinctrl-0 = <&gpioout &alt0 &i2s_alt0>;
+
+ /* I2S interface */
--- /dev/null
+From b899c45208d6f204a6da9a1132577993eeecf0fb Mon Sep 17 00:00:00 2001
+From: Boris Brezillon <boris.brezillon@free-electrons.com>
+Date: Fri, 2 Dec 2016 14:48:12 +0100
+Subject: [PATCH] ARM: dts: bcm283x: Add VEC node in bcm283x.dtsi
+
+Add the VEC (Video EnCoder) node definition in bcm283x.dtsi.
+
+Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm283x.dtsi | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm283x.dtsi
++++ b/arch/arm/boot/dts/bcm283x.dtsi
+@@ -476,6 +476,14 @@
+ status = "disabled";
+ };
+
++ vec: vec@7e806000 {
++ compatible = "brcm,bcm2835-vec";
++ reg = <0x7e806000 0x1000>;
++ clocks = <&clocks BCM2835_CLOCK_VEC>;
++ interrupts = <2 27>;
++ status = "disabled";
++ };
++
+ pixelvalve@7e807000 {
+ compatible = "brcm,bcm2835-pixelvalve2";
+ reg = <0x7e807000 0x100>;
--- /dev/null
+From 5ab1a37c6027c114a87a1ae32cfc5ef303d643c5 Mon Sep 17 00:00:00 2001
+From: Boris Brezillon <boris.brezillon@free-electrons.com>
+Date: Fri, 2 Dec 2016 14:48:13 +0100
+Subject: [PATCH] ARM: dts: bcm283x: Enable the VEC IP on all RaspberryPi
+ boards
+
+Enable the VEC IP on all RaspberryPi boards.
+
+Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
+Signed-off-by: Eric Anholt <eric@anholt.net>
+---
+ arch/arm/boot/dts/bcm2835-rpi.dtsi | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
++++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
+@@ -87,3 +87,8 @@
+ power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
+ status = "okay";
+ };
++
++&vec {
++ power-domains = <&power RPI_POWER_DOMAIN_VEC>;
++ status = "okay";
++};
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
-@@ -386,7 +386,7 @@ static struct gpio_chip bcm2835_gpio_chi
+@@ -380,7 +380,7 @@ static struct gpio_chip bcm2835_gpio_chi
.get = bcm2835_gpio_get,
.set = bcm2835_gpio_set,
.to_irq = bcm2835_gpio_to_irq,
#define BCM2835_PIN_BITMAP_SZ \
DIV_ROUND_UP(BCM2835_NUM_GPIOS, sizeof(unsigned long) * 8)
-@@ -88,13 +89,13 @@ enum bcm2835_pinconf_pull {
+@@ -82,13 +83,13 @@ enum bcm2835_pinconf_param {
struct bcm2835_gpio_irqdata {
struct bcm2835_pinctrl *pc;
/* note: locking assumes each bank will have its own unsigned long */
unsigned long enabled_irq_map[BCM2835_NUM_BANKS];
-@@ -105,7 +106,7 @@ struct bcm2835_pinctrl {
+@@ -99,7 +100,7 @@ struct bcm2835_pinctrl {
struct gpio_chip gpio_chip;
struct pinctrl_gpio_range gpio_range;
spinlock_t irq_lock[BCM2835_NUM_BANKS];
};
-@@ -391,17 +392,16 @@ static struct gpio_chip bcm2835_gpio_chi
+@@ -385,17 +386,16 @@ static struct gpio_chip bcm2835_gpio_chi
.can_sleep = false,
};
events &= pc->enabled_irq_map[bank];
for_each_set_bit(offset, &events, 32) {
gpio = (32 * bank) + offset;
-@@ -409,7 +409,30 @@ static irqreturn_t bcm2835_gpio_irq_hand
+@@ -403,7 +403,30 @@ static irqreturn_t bcm2835_gpio_irq_hand
generic_handle_irq(irq_linear_revmap(pc->irq_domain, gpio));
}
}
static inline void __bcm2835_gpio_irq_config(struct bcm2835_pinctrl *pc,
-@@ -998,8 +1021,6 @@ static int bcm2835_pinctrl_probe(struct
+@@ -992,8 +1015,6 @@ static int bcm2835_pinctrl_probe(struct
for (i = 0; i < BCM2835_NUM_BANKS; i++) {
unsigned long events;
unsigned offset;
/* clear event detection flags */
bcm2835_gpio_wr(pc, GPREN0 + i * 4, 0);
-@@ -1014,10 +1035,15 @@ static int bcm2835_pinctrl_probe(struct
+@@ -1008,10 +1029,15 @@ static int bcm2835_pinctrl_probe(struct
for_each_set_bit(offset, &events, 32)
bcm2835_gpio_wr(pc, GPEDS0 + i * 4, BIT(offset));
len = strlen(dev_name(pc->dev)) + 16;
name = devm_kzalloc(pc->dev, len, GFP_KERNEL);
-@@ -1074,6 +1100,7 @@ static struct platform_driver bcm2835_pi
+@@ -1068,6 +1094,7 @@ static struct platform_driver bcm2835_pi
.remove = bcm2835_pinctrl_remove,
.driver = {
.name = MODULE_NAME,
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
-@@ -1042,6 +1042,8 @@ static int bcm2835_pinctrl_probe(struct
+@@ -1036,6 +1036,8 @@ static int bcm2835_pinctrl_probe(struct
int len;
char *name;
pc->irq[i] = irq_of_parse_and_map(np, i);
--- a/drivers/pinctrl/bcm/pinctrl-bcm2835.c
+++ b/drivers/pinctrl/bcm/pinctrl-bcm2835.c
-@@ -844,6 +844,16 @@ static const struct pinctrl_ops bcm2835_
+@@ -838,6 +838,16 @@ static const struct pinctrl_ops bcm2835_
.dt_free_map = bcm2835_pctl_dt_free_map,
};
static int bcm2835_pmx_get_functions_count(struct pinctrl_dev *pctldev)
{
return BCM2835_FSEL_COUNT;
-@@ -903,6 +913,7 @@ static int bcm2835_pmx_gpio_set_directio
+@@ -897,6 +907,7 @@ static int bcm2835_pmx_gpio_set_directio
}
static const struct pinmux_ops bcm2835_pmx_ops = {
+ firmware = <&firmware>;
+ };
+
-+ thermal: thermal {
++ thermal: thermal@7e212000 {
+ compatible = "brcm,bcm2835-thermal";
+ firmware = <&firmware>;
+ };
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
-@@ -163,6 +163,7 @@
+@@ -366,6 +366,7 @@
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
-@@ -84,3 +84,11 @@
- power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
+@@ -92,3 +92,11 @@
+ power-domains = <&power RPI_POWER_DOMAIN_VEC>;
status = "okay";
};
+
};
rng@7e104000 {
-@@ -188,6 +191,26 @@
- interrupts = <2 14>; /* pwa1 */
+@@ -398,6 +401,26 @@
+ status = "disabled";
};
+ dsi0: dsi@7e209000 {
aux: aux@0x7e215000 {
compatible = "brcm,bcm2835-aux";
#clock-cells = <1>;
-@@ -247,6 +270,26 @@
+@@ -457,6 +480,26 @@
interrupts = <2 1>;
};
+++ /dev/null
-From 9389f17c3c92c3ec54e0d689ad46b95b90a8039a Mon Sep 17 00:00:00 2001
-From: Boris Brezillon <boris.brezillon@free-electrons.com>
-Date: Fri, 2 Dec 2016 14:48:12 +0100
-Subject: [PATCH] ARM: dts: bcm283x: Add VEC node in bcm283x.dtsi
-
-Add the VEC (Video EnCoder) node definition in bcm283x.dtsi.
-
-Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit b899c45208d6f204a6da9a1132577993eeecf0fb)
----
- arch/arm/boot/dts/bcm283x.dtsi | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/arch/arm/boot/dts/bcm283x.dtsi
-+++ b/arch/arm/boot/dts/bcm283x.dtsi
-@@ -310,6 +310,14 @@
- status = "disabled";
- };
-
-+ vec: vec@7e806000 {
-+ compatible = "brcm,bcm2835-vec";
-+ reg = <0x7e806000 0x1000>;
-+ clocks = <&clocks BCM2835_CLOCK_VEC>;
-+ interrupts = <2 27>;
-+ status = "disabled";
-+ };
-+
- pixelvalve@7e807000 {
- compatible = "brcm,bcm2835-pixelvalve2";
- reg = <0x7e807000 0x100>;
+++ /dev/null
-From 686aed7763ddc3bd31b45454cbe73fb217a3d1c1 Mon Sep 17 00:00:00 2001
-From: Boris Brezillon <boris.brezillon@free-electrons.com>
-Date: Fri, 2 Dec 2016 14:48:13 +0100
-Subject: [PATCH] ARM: dts: bcm283x: Enable the VEC IP on all RaspberryPi
- boards
-
-Enable the VEC IP on all RaspberryPi boards.
-
-Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
-Signed-off-by: Eric Anholt <eric@anholt.net>
-(cherry picked from commit 5ab1a37c6027c114a87a1ae32cfc5ef303d643c5)
----
- arch/arm/boot/dts/bcm2835-rpi.dtsi | 5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
-+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
-@@ -92,3 +92,8 @@
- &dsi1 {
- power-domains = <&power RPI_POWER_DOMAIN_DSI1>;
- };
-+
-+&vec {
-+ power-domains = <&power RPI_POWER_DOMAIN_VEC>;
-+ status = "okay";
-+};
projects / openwrt / openwrt.git / commitdiff