ath79: convert to new LED color/function format where possible
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9531_comfast_cf-e314n-v2.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca953x.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/leds/common.h>
8
9 / {
10 compatible = "comfast,cf-e314n-v2", "qca,qca9531";
11 model = "COMFAST CF-E314N v2";
12
13 aliases {
14 serial0 = &uart;
15 led-boot = &led_rssihigh;
16 led-failsafe = &led_rssihigh;
17 led-upgrade = &led_rssihigh;
18 };
19
20 leds {
21 compatible = "gpio-leds";
22
23 pinctrl-names = "default";
24 pinctrl-0 = <&jtag_disable_pins &led_rssilow_pin &led_rssimediumhigh_pin &led_rssihigh_pin>;
25
26 wan {
27 function = LED_FUNCTION_WAN;
28 color = <LED_COLOR_ID_GREEN>;
29 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
30 };
31
32 lan {
33 function = LED_FUNCTION_LAN;
34 color = <LED_COLOR_ID_GREEN>;
35 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
36 };
37
38 rssilow {
39 label = "red:rssilow";
40 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
41 };
42
43 rssimediumlow {
44 label = "red:rssimediumlow";
45 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
46 };
47
48 rssimediumhigh {
49 label = "green:rssimediumhigh";
50 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
51 };
52
53 led_rssihigh: rssihigh {
54 label = "green:rssihigh";
55 gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
56 };
57
58 wlan {
59 function = LED_FUNCTION_WLAN;
60 color = <LED_COLOR_ID_GREEN>;
61 gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
62 linux,default-trigger = "phy0tpt";
63 };
64 };
65
66 keys {
67 compatible = "gpio-keys";
68
69 reset {
70 label = "reset";
71 linux,code = <KEY_RESTART>;
72 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
73 debounce-interval = <60>;
74 };
75 };
76 };
77
78 &pinmux {
79 led_rssilow_pin: pinmux_rssilow_pin {
80 pinctrl-single,bits = <0x8 0x0 0xff000000>;
81 };
82
83 led_rssimediumhigh_pin: pinmux_rssimediumhigh_pin {
84 pinctrl-single,bits = <0xc 0x0 0x00ff0000>;
85 };
86
87 led_rssihigh_pin: pinmux_rssihigh_pin {
88 pinctrl-single,bits = <0x10 0x0 0x000000ff>;
89 };
90 };
91
92 &spi {
93 status = "okay";
94
95 flash@0 {
96 compatible = "jedec,spi-nor";
97 reg = <0>;
98 spi-max-frequency = <25000000>;
99
100 partitions {
101 compatible = "fixed-partitions";
102 #address-cells = <1>;
103 #size-cells = <1>;
104
105 partition@0 {
106 label = "u-boot";
107 reg = <0x000000 0x010000>;
108 read-only;
109 };
110
111 art: partition@10000 {
112 label = "art";
113 reg = <0x010000 0x010000>;
114 read-only;
115
116 nvmem-layout {
117 compatible = "fixed-layout";
118 #address-cells = <1>;
119 #size-cells = <1>;
120
121 macaddr_art_0: macaddr@0 {
122 reg = <0x0 0x6>;
123 };
124
125 macaddr_art_6: macaddr@6 {
126 reg = <0x6 0x6>;
127 };
128 };
129 };
130
131 partition@20000 {
132 compatible = "denx,uimage";
133 label = "firmware";
134 reg = <0x020000 0x7c0000>;
135 };
136
137 partition@7e0000 {
138 label = "configs";
139 reg = <0x7e0000 0x010000>;
140 read-only;
141 };
142
143 partition@7f0000 {
144 label = "nvram";
145 reg = <0x7f0000 0x010000>;
146 read-only;
147 };
148 };
149 };
150 };
151
152 &eth0 {
153 status = "okay";
154
155 phy-handle = <&swphy4>;
156
157 nvmem-cells = <&macaddr_art_0>;
158 nvmem-cell-names = "mac-address";
159 };
160
161 &eth1 {
162 nvmem-cells = <&macaddr_art_6>;
163 nvmem-cell-names = "mac-address";
164 };
165
166 &wmac {
167 status = "okay";
168 mtd-cal-data = <&art 0x1000>;
169 };