ath79: add missing clock name strings in SoC dtsi
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9561_tplink_archer-c59-v1.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca9561_tplink_archer-c5x.dtsi"
4
5 / {
6 compatible = "tplink,archer-c59-v1", "qca,qca9560";
7 model = "TP-Link Archer C59 v1";
8
9 aliases {
10 label-mac-device = &eth1;
11 };
12 };
13
14 &leds {
15 usb {
16 label = "green:usb";
17 gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>;
18 linux,default-trigger = "usbport";
19 trigger-sources = <&hub_port>;
20 };
21 };
22
23 &usb0 {
24 #address-cells = <1>;
25 #size-cells = <0>;
26 status = "okay";
27
28 hub_port: port@1 {
29 reg = <1>;
30 #trigger-source-cells = <0>;
31 };
32 };
33
34 &usb_phy0 {
35 status = "okay";
36 };
37
38 &spi {
39 status = "okay";
40
41 flash@0 {
42 compatible = "jedec,spi-nor";
43 reg = <0>;
44 spi-max-frequency = <25000000>;
45
46 partitions {
47 compatible = "fixed-partitions";
48 #address-cells = <1>;
49 #size-cells = <1>;
50
51 partition@0 {
52 label = "u-boot";
53 reg = <0x000000 0x010000>;
54 read-only;
55 };
56
57 info: partition@10000 {
58 label = "info";
59 reg = <0x010000 0x010000>;
60 read-only;
61 };
62
63 partition@20000 {
64 compatible = "denx,uimage";
65 label = "firmware";
66 reg = <0x020000 0xe30000>;
67 };
68
69 partition@e50000 {
70 label = "tplink";
71 reg = <0xe50000 0x1a0000>;
72 read-only;
73 };
74
75 art: partition@ff0000 {
76 label = "art";
77 reg = <0xff0000 0x010000>;
78 read-only;
79 };
80 };
81 };
82 };
83
84 &eth0 {
85 nvmem-cells = <&macaddr_info_8>;
86 nvmem-cell-names = "mac-address";
87 mac-address-increment = <1>;
88 };
89
90 &eth1 {
91 nvmem-cells = <&macaddr_info_8>;
92 nvmem-cell-names = "mac-address";
93 };
94
95 &wmac {
96 mtd-cal-data = <&art 0x1000>;
97
98 nvmem-cells = <&macaddr_info_8>;
99 nvmem-cell-names = "mac-address";
100 };
101
102 &info {
103 compatible = "nvmem-cells";
104 #address-cells = <1>;
105 #size-cells = <1>;
106
107 macaddr_info_8: macaddr@8 {
108 reg = <0x8 0x6>;
109 };
110 };