ath79: add missing clock name strings in SoC dtsi
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9563_elecom_wrc-300ghbk2-i.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca9563_elecom_wrc-ghbk2-i.dtsi"
4
5 / {
6 model = "ELECOM WRC-300GHBK2-I";
7 compatible = "elecom,wrc-300ghbk2-i", "qca,qca9563";
8 };
9
10 &leds {
11 led_power: power {
12 label = "white:power";
13 gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
14 default-state = "on";
15 };
16
17 wlan2g {
18 label = "white:wlan2g";
19 gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
20 linux,default-trigger = "phy0tpt";
21 };
22 };
23
24 &partitions {
25 partition@70000 {
26 compatible = "denx,uimage";
27 label = "firmware";
28 reg = <0x070000 0x770000>;
29 };
30
31 partition@7e0000 {
32 label = "hwconfig";
33 reg = <0x7e0000 0x010000>;
34 read-only;
35 };
36
37 art: partition@7f0000 {
38 label = "art";
39 reg = <0x7f0000 0x010000>;
40 read-only;
41
42 compatible = "nvmem-cells";
43 #address-cells = <1>;
44 #size-cells = <1>;
45
46 cal_art_1000: cal@1000 {
47 reg = <0x1000 0x440>;
48 };
49
50 macaddr_art_1002: macaddr@1002 {
51 reg = <0x1002 0x6>;
52 };
53 };
54 };
55
56 &eth0 {
57 nvmem-cells = <&macaddr_art_1002>;
58 nvmem-cell-names = "mac-address";
59 mac-address-increment = <(-1)>;
60 };
61
62 &wmac {
63 nvmem-cells = <&cal_art_1000>;
64 nvmem-cell-names = "calibration";
65 };