target/linux/bcm53xx/patches-5.15/030-v5.15-0008-ARM-dts-NSP-Add-DT-files-for-Meraki-MX64-series.patch

   1 From 3f902645280baf0d7dab57c227cc14f43edb45ef Mon Sep 17 00:00:00 2001
   2 From: Matthew Hagan <mnhagan88@gmail.com>
   3 Date: Fri, 6 Aug 2021 21:44:34 +0100
   4 Subject: [PATCH] ARM: dts: NSP: Add DT files for Meraki MX64 series
   5
   6 MX64 & MX64W Hardware info:
   7   - CPU: Broadcom BCM58625 Cortex A9 @ 1200Mhz
   8   - RAM: 2 GB (4 x 4Gb SK Hynix H5TC4G83CFR)
   9   - Storage: 1 GB (Micron MT29F8G08ABACA)
  10   - Networking: BCM58625 internal switch (5x 1GbE ports)
  11   - USB: 1x USB2.0
  12   - Serial: Internal header
  13   - WLAN(MX64W only): 2x Broadcom BCM43520KMLG on the PCI bus
  14
  15 This patch adds the Meraki MX64 series-specific bindings. Since some
  16 devices make use of the older A0 SoC, changes need to be made to
  17 accommodate this case, including removal of coherency options and
  18 modification to the secondary-boot-reg.
  19
  20 Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
  21 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
  22 ---
  23  arch/arm/boot/dts/Makefile                    |   4 +
  24  .../boot/dts/bcm958625-meraki-kingpin.dtsi    | 163 ++++++++++++++++++
  25  .../arm/boot/dts/bcm958625-meraki-mx64-a0.dts |  25 +++
  26  arch/arm/boot/dts/bcm958625-meraki-mx64.dts   |  24 +++
  27  .../boot/dts/bcm958625-meraki-mx64w-a0.dts    |  33 ++++
  28  arch/arm/boot/dts/bcm958625-meraki-mx64w.dts  |  32 ++++
  29  6 files changed, 281 insertions(+)
  30  create mode 100644 arch/arm/boot/dts/bcm958625-meraki-kingpin.dtsi
  31  create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64-a0.dts
  32  create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64.dts
  33  create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64w-a0.dts
  34  create mode 100644 arch/arm/boot/dts/bcm958625-meraki-mx64w.dts
  35
  36 --- a/arch/arm/boot/dts/Makefile
  37 +++ b/arch/arm/boot/dts/Makefile
  38 @@ -157,6 +157,10 @@ dtb-$(CONFIG_ARCH_BCM_NSP) += \
  39         bcm958525xmc.dtb \
  40         bcm958622hr.dtb \
  41         bcm958623hr.dtb \
  42 +       bcm958625-meraki-mx64.dtb \
  43 +       bcm958625-meraki-mx64-a0.dtb \
  44 +       bcm958625-meraki-mx64w.dtb \
  45 +       bcm958625-meraki-mx64w-a0.dtb \
  46         bcm958625hr.dtb \
  47         bcm988312hr.dtb \
  48         bcm958625k.dtb
  49 --- /dev/null
  50 +++ b/arch/arm/boot/dts/bcm958625-meraki-kingpin.dtsi
  51 @@ -0,0 +1,163 @@
  52 +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
  53 +/*
  54 + * Device Tree Bindings for Cisco Meraki MX64 series (Kingpin).
  55 + *
  56 + * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
  57 + */
  58 +
  59 +#include "bcm958625-meraki-mx6x-common.dtsi"
  60 +
  61 +/ {
  62 +
  63 +       keys {
  64 +               compatible = "gpio-keys-polled";
  65 +               autorepeat;
  66 +               poll-interval = <20>;
  67 +
  68 +               reset {
  69 +                       label = "reset";
  70 +                       linux,code = <KEY_RESTART>;
  71 +                       gpios = <&gpioa 6 GPIO_ACTIVE_LOW>;
  72 +               };
  73 +       };
  74 +
  75 +       leds {
  76 +               compatible = "gpio-leds";
  77 +
  78 +               led-0 {
  79 +                       /* green:lan1-left */
  80 +                       function = LED_FUNCTION_ACTIVITY;
  81 +                       function-enumerator = <0>;
  82 +                       color = <LED_COLOR_ID_GREEN>;
  83 +                       gpios = <&gpioa 19 GPIO_ACTIVE_LOW>;
  84 +               };
  85 +
  86 +               led-1 {
  87 +                       /* green:lan1-right */
  88 +                       function = LED_FUNCTION_ACTIVITY;
  89 +                       function-enumerator = <1>;
  90 +                       color = <LED_COLOR_ID_GREEN>;
  91 +                       gpios = <&gpioa 18 GPIO_ACTIVE_LOW>;
  92 +               };
  93 +
  94 +               led-2 {
  95 +                       /* green:lan2-left */
  96 +                       function = LED_FUNCTION_ACTIVITY;
  97 +                       function-enumerator = <2>;
  98 +                       color = <LED_COLOR_ID_GREEN>;
  99 +                       gpios = <&gpioa 24 GPIO_ACTIVE_LOW>;
 100 +               };
 101 +
 102 +               led-3 {
 103 +                       /* green:lan2-right */
 104 +                       function = LED_FUNCTION_ACTIVITY;
 105 +                       function-enumerator = <3>;
 106 +                       color = <LED_COLOR_ID_GREEN>;
 107 +                       gpios = <&gpioa 20 GPIO_ACTIVE_LOW>;
 108 +               };
 109 +
 110 +               led-4 {
 111 +                       /* green:lan3-left */
 112 +                       function = LED_FUNCTION_ACTIVITY;
 113 +                       function-enumerator = <4>;
 114 +                       color = <LED_COLOR_ID_GREEN>;
 115 +                       gpios = <&gpioa 26 GPIO_ACTIVE_LOW>;
 116 +               };
 117 +
 118 +               led-5 {
 119 +                       /* green:lan3-right */
 120 +                       function = LED_FUNCTION_ACTIVITY;
 121 +                       function-enumerator = <5>;
 122 +                       color = <LED_COLOR_ID_GREEN>;
 123 +                       gpios = <&gpioa 25 GPIO_ACTIVE_LOW>;
 124 +               };
 125 +
 126 +               led-6 {
 127 +                       /* green:lan4-left */
 128 +                       function = LED_FUNCTION_ACTIVITY;
 129 +                       function-enumerator = <6>;
 130 +                       color = <LED_COLOR_ID_GREEN>;
 131 +                       gpios = <&gpioa 28 GPIO_ACTIVE_LOW>;
 132 +               };
 133 +
 134 +               led-7 {
 135 +                       /* green:lan4-right */
 136 +                       function = LED_FUNCTION_ACTIVITY;
 137 +                       function-enumerator = <7>;
 138 +                       color = <LED_COLOR_ID_GREEN>;
 139 +                       gpios = <&gpioa 27 GPIO_ACTIVE_LOW>;
 140 +               };
 141 +
 142 +               led-8 {
 143 +                       /* green:wan-left */
 144 +                       function = LED_FUNCTION_ACTIVITY;
 145 +                       function-enumerator = <8>;
 146 +                       color = <LED_COLOR_ID_GREEN>;
 147 +                       gpios = <&gpioa 30 GPIO_ACTIVE_LOW>;
 148 +               };
 149 +
 150 +               led-9 {
 151 +                       /* green:wan-right */
 152 +                       function = LED_FUNCTION_ACTIVITY;
 153 +                       function-enumerator = <9>;
 154 +                       color = <LED_COLOR_ID_GREEN>;
 155 +                       gpios = <&gpioa 29 GPIO_ACTIVE_LOW>;
 156 +               };
 157 +
 158 +               led-a {
 159 +                       /* amber:power */
 160 +                       function = LED_FUNCTION_POWER;
 161 +                       color = <LED_COLOR_ID_AMBER>;
 162 +                       gpios = <&gpioa 0 GPIO_ACTIVE_LOW>;
 163 +                       default-state = "on";
 164 +               };
 165 +
 166 +               led-b {
 167 +                       /* white:status */
 168 +                       function = LED_FUNCTION_STATUS;
 169 +                       color = <LED_COLOR_ID_WHITE>;
 170 +                       gpios = <&gpioa 31 GPIO_ACTIVE_HIGH>;
 171 +               };
 172 +       };
 173 +};
 174 +
 175 +&srab {
 176 +       compatible = "brcm,bcm58625-srab", "brcm,nsp-srab";
 177 +       status = "okay";
 178 +
 179 +       ports {
 180 +               port@0 {
 181 +                       label = "lan1";
 182 +                       reg = <0>;
 183 +               };
 184 +
 185 +               port@1 {
 186 +                       label = "lan2";
 187 +                       reg = <1>;
 188 +               };
 189 +
 190 +               port@2 {
 191 +                       label = "lan3";
 192 +                       reg = <2>;
 193 +               };
 194 +
 195 +               port@3 {
 196 +                       label = "lan4";
 197 +                       reg = <3>;
 198 +               };
 199 +
 200 +               port@4 {
 201 +                       label = "wan";
 202 +                       reg = <4>;
 203 +               };
 204 +
 205 +               port@8 {
 206 +                       ethernet = <&amac2>;
 207 +                       reg = <8>;
 208 +                       fixed-link {
 209 +                               speed = <1000>;
 210 +                               full-duplex;
 211 +                       };
 212 +               };
 213 +       };
 214 +};
 215 --- /dev/null
 216 +++ b/arch/arm/boot/dts/bcm958625-meraki-mx64-a0.dts
 217 @@ -0,0 +1,25 @@
 218 +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 219 +/*
 220 + * Device Tree Bindings for Cisco Meraki MX64 with A0 SoC.
 221 + *
 222 + * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
 223 + */
 224 +
 225 +/dts-v1/;
 226 +
 227 +#include "bcm958625-meraki-kingpin.dtsi"
 228 +#include "bcm-nsp-ax.dtsi"
 229 +
 230 +/ {
 231 +       model = "Cisco Meraki MX64(A0)";
 232 +       compatible = "meraki,mx64-a0", "brcm,bcm58625", "brcm,nsp";
 233 +
 234 +       chosen {
 235 +               stdout-path = "serial0:115200n8";
 236 +       };
 237 +
 238 +       memory@60000000 {
 239 +               device_type = "memory";
 240 +               reg = <0x60000000 0x80000000>;
 241 +       };
 242 +};
 243 --- /dev/null
 244 +++ b/arch/arm/boot/dts/bcm958625-meraki-mx64.dts
 245 @@ -0,0 +1,24 @@
 246 +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 247 +/*
 248 + * Device Tree Bindings for Cisco Meraki MX64 with B0+ SoC.
 249 + *
 250 + * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
 251 + */
 252 +
 253 +/dts-v1/;
 254 +
 255 +#include "bcm958625-meraki-kingpin.dtsi"
 256 +
 257 +/ {
 258 +       model = "Cisco Meraki MX64";
 259 +       compatible = "meraki,mx64", "brcm,bcm58625", "brcm,nsp";
 260 +
 261 +       chosen {
 262 +               stdout-path = "serial0:115200n8";
 263 +       };
 264 +
 265 +       memory@60000000 {
 266 +               device_type = "memory";
 267 +               reg = <0x60000000 0x80000000>;
 268 +       };
 269 +};
 270 --- /dev/null
 271 +++ b/arch/arm/boot/dts/bcm958625-meraki-mx64w-a0.dts
 272 @@ -0,0 +1,33 @@
 273 +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 274 +/*
 275 + * Device Tree Bindings for Cisco Meraki MX64W with A0 SoC.
 276 + *
 277 + * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
 278 + */
 279 +
 280 +/dts-v1/;
 281 +
 282 +#include "bcm958625-meraki-kingpin.dtsi"
 283 +#include "bcm-nsp-ax.dtsi"
 284 +
 285 +/ {
 286 +       model = "Cisco Meraki MX64W(A0)";
 287 +       compatible = "meraki,mx64w-a0", "brcm,bcm58625", "brcm,nsp";
 288 +
 289 +       chosen {
 290 +               stdout-path = "serial0:115200n8";
 291 +       };
 292 +
 293 +       memory@60000000 {
 294 +               device_type = "memory";
 295 +               reg = <0x60000000 0x80000000>;
 296 +       };
 297 +};
 298 +
 299 +&pcie0 {
 300 +       status = "okay";
 301 +};
 302 +
 303 +&pcie1 {
 304 +       status = "okay";
 305 +};
 306 --- /dev/null
 307 +++ b/arch/arm/boot/dts/bcm958625-meraki-mx64w.dts
 308 @@ -0,0 +1,32 @@
 309 +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
 310 +/*
 311 + * Device Tree Bindings for Cisco Meraki MX64W with B0+ SoC.
 312 + *
 313 + * Copyright (C) 2020-2021 Matthew Hagan <mnhagan88@gmail.com>
 314 + */
 315 +
 316 +/dts-v1/;
 317 +
 318 +#include "bcm958625-meraki-kingpin.dtsi"
 319 +
 320 +/ {
 321 +       model = "Cisco Meraki MX64W";
 322 +       compatible = "meraki,mx64w", "brcm,bcm58625", "brcm,nsp";
 323 +
 324 +       chosen {
 325 +               stdout-path = "serial0:115200n8";
 326 +       };
 327 +
 328 +       memory@60000000 {
 329 +               device_type = "memory";
 330 +               reg = <0x60000000 0x80000000>;
 331 +       };
 332 +};
 333 +
 334 +&pcie0 {
 335 +       status = "okay";
 336 +};
 337 +
 338 +&pcie1 {
 339 +       status = "okay";
 340 +};