1 From 8f096adfd96941e596b5fbf30a21193e32f2c1b0 Mon Sep 17 00:00:00 2001
2 From: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
3 Date: Fri, 27 May 2016 15:10:40 +0530
4 Subject: [PATCH 38/93] Shift board specific configurations
6 Board specific configurations are moved from
7 ls1012a_common.h to ls1012aqds.h and ls1012ardb.h
9 Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
10 Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
12 include/configs/ls1012a_common.h | 60 --------------------------------------
13 include/configs/ls1012aqds.h | 58 ++++++++++++++++++++++++++++++++++++
14 include/configs/ls1012ardb.h | 58 ++++++++++++++++++++++++++++++++++++
15 3 files changed, 116 insertions(+), 60 deletions(-)
17 diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
18 index 89d1370..07ef7c6 100644
19 --- a/include/configs/ls1012a_common.h
20 +++ b/include/configs/ls1012a_common.h
22 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
23 #endif /* CONFIG_EMU */
26 -#if !defined(CONFIG_EMU)
29 -#define CONFIG_CMD_MMC
30 -#define CONFIG_FSL_ESDHC
31 -#define CONFIG_FSL_ESDHC_TWO_CONTROLLERS_SUPPORT
32 -#define CONFIG_FSL_ESDHC_1_NON_REMOVABLE_CARD
33 -#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
34 -#define CONFIG_GENERIC_MMC
35 -#define CONFIG_CMD_FAT
36 -#define CONFIG_DOS_PARTITION
38 -#endif /* CONFIG_EMU */
41 -#if !defined(CONFIG_EMU)
42 -#define CONFIG_LIBATA
43 -#define CONFIG_SCSI_AHCI
44 -#define CONFIG_SCSI_AHCI_PLAT
45 -#define CONFIG_CMD_SCSI
46 -#define CONFIG_CMD_FAT
47 -#define CONFIG_CMD_EXT2
48 -#define CONFIG_DOS_PARTITION
49 -#define CONFIG_BOARD_LATE_INIT
51 -#define CONFIG_SYS_SATA AHCI_BASE_ADDR
53 -#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
54 -#define CONFIG_SYS_SCSI_MAX_LUN 1
55 -#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
56 - CONFIG_SYS_SCSI_MAX_LUN)
58 -#define CONFIG_PCI /* Enable PCI/PCIE */
59 -#define CONFIG_PCIE1 /* PCIE controller 1 */
60 -#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
61 -#define FSL_PCIE_COMPAT "fsl,ls1043a-pcie"
63 -#define CONFIG_SYS_PCI_64BIT
65 -#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF 0x00000000
66 -#define CONFIG_SYS_PCIE_CFG0_SIZE 0x00001000 /* 4k */
67 -#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF 0x00001000
68 -#define CONFIG_SYS_PCIE_CFG1_SIZE 0x00001000 /* 4k */
70 -#define CONFIG_SYS_PCIE_IO_BUS 0x00000000
71 -#define CONFIG_SYS_PCIE_IO_PHYS_OFF 0x00010000
72 -#define CONFIG_SYS_PCIE_IO_SIZE 0x00010000 /* 64k */
74 -#define CONFIG_SYS_PCIE_MEM_BUS 0x08000000
75 -#define CONFIG_SYS_PCIE_MEM_PHYS_OFF 0x04000000
76 -#define CONFIG_SYS_PCIE_MEM_SIZE 0x80000000 /* 128M */
78 -#define CONFIG_NET_MULTI
79 -#define CONFIG_PCI_PNP
81 -#define CONFIG_PCI_SCAN_SHOW
82 -#define CONFIG_CMD_PCI
85 #define CONFIG_CONS_INDEX 1
86 #define CONFIG_SYS_NS16550_SERIAL
87 #define CONFIG_SYS_NS16550_REG_SIZE 1
88 diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
89 index de998b8..488811b 100644
90 --- a/include/configs/ls1012aqds.h
91 +++ b/include/configs/ls1012aqds.h
93 #define SGMII_CARD_PORT4_PHY_ADDR 0x1F
97 +#if !defined(CONFIG_EMU)
100 +#define CONFIG_CMD_MMC
101 +#define CONFIG_FSL_ESDHC
102 +#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
103 +#define CONFIG_GENERIC_MMC
104 +#define CONFIG_CMD_FAT
105 +#define CONFIG_DOS_PARTITION
107 +#endif /* CONFIG_EMU */
110 +#if !defined(CONFIG_EMU)
111 +#define CONFIG_LIBATA
112 +#define CONFIG_SCSI_AHCI
113 +#define CONFIG_SCSI_AHCI_PLAT
114 +#define CONFIG_CMD_SCSI
115 +#define CONFIG_CMD_FAT
116 +#define CONFIG_CMD_EXT2
117 +#define CONFIG_DOS_PARTITION
118 +#define CONFIG_BOARD_LATE_INIT
120 +#define CONFIG_SYS_SATA AHCI_BASE_ADDR
122 +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
123 +#define CONFIG_SYS_SCSI_MAX_LUN 1
124 +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
125 + CONFIG_SYS_SCSI_MAX_LUN)
127 +#define CONFIG_PCI /* Enable PCI/PCIE */
128 +#define CONFIG_PCIE1 /* PCIE controller 1 */
129 +#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
130 +#define FSL_PCIE_COMPAT "fsl,ls1043a-pcie"
132 +#define CONFIG_SYS_PCI_64BIT
134 +#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF 0x00000000
135 +#define CONFIG_SYS_PCIE_CFG0_SIZE 0x00001000 /* 4k */
136 +#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF 0x00001000
137 +#define CONFIG_SYS_PCIE_CFG1_SIZE 0x00001000 /* 4k */
139 +#define CONFIG_SYS_PCIE_IO_BUS 0x00000000
140 +#define CONFIG_SYS_PCIE_IO_PHYS_OFF 0x00010000
141 +#define CONFIG_SYS_PCIE_IO_SIZE 0x00010000 /* 64k */
143 +#define CONFIG_SYS_PCIE_MEM_BUS 0x08000000
144 +#define CONFIG_SYS_PCIE_MEM_PHYS_OFF 0x04000000
145 +#define CONFIG_SYS_PCIE_MEM_SIZE 0x80000000 /* 128M */
147 +#define CONFIG_NET_MULTI
148 +#define CONFIG_PCI_PNP
149 +#define CONFIG_E1000
150 +#define CONFIG_PCI_SCAN_SHOW
151 +#define CONFIG_CMD_PCI
157 diff --git a/include/configs/ls1012ardb.h b/include/configs/ls1012ardb.h
158 index b40e02b..1629e19 100644
159 --- a/include/configs/ls1012ardb.h
160 +++ b/include/configs/ls1012ardb.h
162 #define CONFIG_CMD_USB_MASS_STORAGE
166 +#if !defined(CONFIG_EMU)
169 +#define CONFIG_CMD_MMC
170 +#define CONFIG_FSL_ESDHC
171 +#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
172 +#define CONFIG_GENERIC_MMC
173 +#define CONFIG_CMD_FAT
174 +#define CONFIG_DOS_PARTITION
176 +#endif /* CONFIG_EMU */
179 +#if !defined(CONFIG_EMU)
180 +#define CONFIG_LIBATA
181 +#define CONFIG_SCSI_AHCI
182 +#define CONFIG_SCSI_AHCI_PLAT
183 +#define CONFIG_CMD_SCSI
184 +#define CONFIG_CMD_FAT
185 +#define CONFIG_CMD_EXT2
186 +#define CONFIG_DOS_PARTITION
187 +#define CONFIG_BOARD_LATE_INIT
189 +#define CONFIG_SYS_SATA AHCI_BASE_ADDR
191 +#define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
192 +#define CONFIG_SYS_SCSI_MAX_LUN 1
193 +#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
194 + CONFIG_SYS_SCSI_MAX_LUN)
196 +#define CONFIG_PCI /* Enable PCI/PCIE */
197 +#define CONFIG_PCIE1 /* PCIE controller 1 */
198 +#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
199 +#define FSL_PCIE_COMPAT "fsl,ls1043a-pcie"
201 +#define CONFIG_SYS_PCI_64BIT
203 +#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF 0x00000000
204 +#define CONFIG_SYS_PCIE_CFG0_SIZE 0x00001000 /* 4k */
205 +#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF 0x00001000
206 +#define CONFIG_SYS_PCIE_CFG1_SIZE 0x00001000 /* 4k */
208 +#define CONFIG_SYS_PCIE_IO_BUS 0x00000000
209 +#define CONFIG_SYS_PCIE_IO_PHYS_OFF 0x00010000
210 +#define CONFIG_SYS_PCIE_IO_SIZE 0x00010000 /* 64k */
212 +#define CONFIG_SYS_PCIE_MEM_BUS 0x08000000
213 +#define CONFIG_SYS_PCIE_MEM_PHYS_OFF 0x04000000
214 +#define CONFIG_SYS_PCIE_MEM_SIZE 0x80000000 /* 128M */
216 +#define CONFIG_NET_MULTI
217 +#define CONFIG_PCI_PNP
218 +#define CONFIG_E1000
219 +#define CONFIG_PCI_SCAN_SHOW
220 +#define CONFIG_CMD_PCI