1 /******************************************************************************
3 ** FILE NAME : ifxmips_atm_core.h
9 ** DESCRIPTION : ATM driver header file (core functions)
10 ** COPYRIGHT : Copyright (c) 2006
11 ** Infineon Technologies AG
12 ** Am Campeon 1-12, 85579 Neubiberg, Germany
14 ** This program is free software; you can redistribute it and/or modify
15 ** it under the terms of the GNU General Public License as published by
16 ** the Free Software Foundation; either version 2 of the License, or
17 ** (at your option) any later version.
20 ** $Date $Author $Comment
21 ** 17 JUN 2009 Xu Liang Init Version
22 *******************************************************************************/
24 #ifndef IFXMIPS_ATM_CORE_H
25 #define IFXMIPS_ATM_CORE_H
28 #define INT_NUM_IM2_IRL24 (INT_NUM_IM2_IRL0 + 24)
29 #define INT_NUM_IM2_IRL13 (INT_NUM_IM2_IRL0 + 13)
30 #define CONFIG_IFXMIPS_DSL_CPE_MEI
31 #define IFX_REG_W32(_v, _r) __raw_writel((_v), (volatile unsigned int *)(_r))
32 #define IFX_REG_R32(_r) __raw_readl((volatile unsigned int *)(_r))
33 #define IFX_REG_W32_MASK(_clr, _set, _r) IFX_REG_W32((IFX_REG_R32((_r)) & ~(_clr)) | (_set), (_r))
34 #define SET_BITS(x, msb, lsb, value) (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb)))
38 void (*shutdown
)(void);
40 int (*start
)(int pp32
);
41 void (*stop
)(int pp32
);
43 void (*fw_ver
)(unsigned int *major
, unsigned int *minor
);
46 #include <lantiq_atm.h>
49 * ####################################
51 * ####################################
58 #define ENABLE_DEBUG 1
60 #define ENABLE_ASSERT 1
64 #define DEBUG_DUMP_SKB 1
68 #define DISABLE_QOS_WORKAROUND 0
70 #define ENABLE_DBG_PROC 1
72 #define ENABLE_FW_PROC 1
74 #ifdef CONFIG_IFX_ATM_TASKLET
75 #define ENABLE_TASKLET 1
78 #ifdef CONFIG_IFX_ATM_RETX
79 #define ENABLE_ATM_RETX 1
82 #if defined(CONFIG_DSL_MEI_CPE_DRV) && !defined(CONFIG_IFXMIPS_DSL_CPE_MEI)
83 #define CONFIG_IFXMIPS_DSL_CPE_MEI 1
87 * Debug/Assert/Error Message
90 #define ifx_atm_dbg_enable 1
92 #define DBG_ENABLE_MASK_ERR (1 << 0)
93 #define DBG_ENABLE_MASK_DEBUG_PRINT (1 << 1)
94 #define DBG_ENABLE_MASK_ASSERT (1 << 2)
95 #define DBG_ENABLE_MASK_DUMP_SKB_RX (1 << 8)
96 #define DBG_ENABLE_MASK_DUMP_SKB_TX (1 << 9)
97 #define DBG_ENABLE_MASK_DUMP_QOS (1 << 10)
98 #define DBG_ENABLE_MASK_DUMP_INIT (1 << 11)
99 #define DBG_ENABLE_MASK_MAC_SWAP (1 << 12)
100 #define DBG_ENABLE_MASK_ALL (DBG_ENABLE_MASK_ERR | DBG_ENABLE_MASK_DEBUG_PRINT | DBG_ENABLE_MASK_ASSERT | DBG_ENABLE_MASK_DUMP_SKB_RX | DBG_ENABLE_MASK_DUMP_SKB_TX | DBG_ENABLE_MASK_DUMP_QOS | DBG_ENABLE_MASK_DUMP_INIT | DBG_ENABLE_MASK_MAC_SWAP)
102 #if defined(ENABLE_ASSERT) && ENABLE_ASSERT
103 #define ASSERT(cond, format, arg...) do { if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_ASSERT) && !(cond) ) printk(KERN_ERR __FILE__ ":%d:%s: " format "\n", __LINE__, __FUNCTION__, ##arg); } while ( 0 )
105 #define ASSERT(cond, format, arg...)
112 #define DEFAULT_TX_LINK_RATE 3200 // in cells
115 * ATM Port, QSB Queue, DMA RX/TX Channel Parameters
117 #define ATM_PORT_NUMBER 2
118 #define MAX_QUEUE_NUMBER 16
119 #define OAM_RX_QUEUE 15
120 #define QSB_RESERVE_TX_QUEUE 0
121 #define FIRST_QSB_QID 1
122 #define MAX_PVC_NUMBER (MAX_QUEUE_NUMBER - FIRST_QSB_QID)
123 #define MAX_RX_DMA_CHANNEL_NUMBER 8
124 #define MAX_TX_DMA_CHANNEL_NUMBER 16
125 #define DATA_BUFFER_ALIGNMENT EMA_ALIGNMENT
126 #define DESC_ALIGNMENT 8
127 #define DEFAULT_RX_HUNT_BITTH 4
130 * RX DMA Channel Allocation
132 #define RX_DMA_CH_OAM 0
133 #define RX_DMA_CH_AAL 1
134 #define RX_DMA_CH_TOTAL 2
135 #define RX_DMA_CH_OAM_DESC_LEN 32
136 #define RX_DMA_CH_OAM_BUF_SIZE ((CELL_SIZE + 14) & ~15)
137 #define RX_DMA_CH_AAL_BUF_SIZE (2048 - 48)
142 #define OAM_HTU_ENTRY_NUMBER 3
143 #define OAM_F4_SEG_HTU_ENTRY 0
144 #define OAM_F4_TOT_HTU_ENTRY 1
145 #define OAM_F5_HTU_ENTRY 2
146 #define OAM_F4_CELL_ID 0
147 #define OAM_F5_CELL_ID 15
148 #if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX
149 #undef OAM_HTU_ENTRY_NUMBER
150 #define OAM_HTU_ENTRY_NUMBER 4
151 #define OAM_ARQ_HTU_ENTRY 3
155 * RX Frame Definitions
157 #define MAX_RX_PACKET_ALIGN_BYTES 3
158 #define MAX_RX_PACKET_PADDING_BYTES 3
159 #define RX_INBAND_TRAILER_LENGTH 8
160 #define MAX_RX_FRAME_EXTRA_BYTES (RX_INBAND_TRAILER_LENGTH + MAX_RX_PACKET_ALIGN_BYTES + MAX_RX_PACKET_PADDING_BYTES)
163 * TX Frame Definitions
165 #define MAX_TX_HEADER_ALIGN_BYTES 12
166 #define MAX_TX_PACKET_ALIGN_BYTES 3
167 #define MAX_TX_PACKET_PADDING_BYTES 3
168 #define TX_INBAND_HEADER_LENGTH 8
169 #define MAX_TX_FRAME_EXTRA_BYTES (TX_INBAND_HEADER_LENGTH + MAX_TX_HEADER_ALIGN_BYTES + MAX_TX_PACKET_ALIGN_BYTES + MAX_TX_PACKET_PADDING_BYTES)
171 #define CELL_SIZE ATM_AAL0_SDU
173 #if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX
174 #define RETX_PLAYOUT_BUFFER_ORDER 6
175 #define RETX_PLAYOUT_BUFFER_SIZE (PAGE_SIZE * (1 << RETX_PLAYOUT_BUFFER_ORDER))
176 #define RETX_PLAYOUT_FW_BUFF_SIZE (RETX_PLAYOUT_BUFFER_SIZE / (32 * 56 /* cell size */))
177 #define RETX_POLLING_INTERVAL (HZ / 100 > 0 ? HZ / 100 : 1)
186 unsigned int tx_max_cell_rate
;
187 unsigned int tx_current_cell_rate
;
195 volatile struct tx_descriptor
*tx_desc
;
196 unsigned int tx_desc_pos
;
197 struct sk_buff
**tx_skb
;
199 unsigned int aal5_vcc_crc_err
; /* number of packets with CRC error */
200 unsigned int aal5_vcc_oversize_sdu
; /* number of packets with oversize error */
205 struct atm_priv_data
{
206 unsigned long conn_table
;
207 struct connection conn
[MAX_PVC_NUMBER
];
209 volatile struct rx_descriptor
*aal_desc
;
210 unsigned int aal_desc_pos
;
212 volatile struct rx_descriptor
*oam_desc
;
213 unsigned char *oam_buf
;
214 unsigned int oam_desc_pos
;
216 struct port port
[ATM_PORT_NUMBER
];
218 unsigned int wrx_pdu
; /* successfully received AAL5 packet */
219 unsigned int wrx_drop_pdu
; /* AAL5 packet dropped by driver on RX */
220 unsigned int wtx_pdu
; /* successfully transmitted AAL5 packet */
221 unsigned int wtx_err_pdu
; /* error AAL5 packet */
222 unsigned int wtx_drop_pdu
; /* AAL5 packet dropped by driver on TX */
224 unsigned int wrx_oam
; /* successfully received OAM cell */
225 unsigned int wrx_drop_oam
; /* OAM cell dropped by driver on RX */
226 unsigned int wtx_oam
; /* successfully transmitted OAM cell */
227 unsigned int wtx_err_oam
; /* error during transmiting OAM cell */
228 unsigned int wtx_drop_oam
; /* OAM cell dropped by driver on TX */
230 ppe_u64_t wrx_total_byte
;
231 ppe_u64_t wtx_total_byte
;
232 unsigned int prev_wrx_total_byte
;
233 unsigned int prev_wtx_total_byte
;
242 #include "ifxmips_atm_ppe_common.h"
243 #include "ifxmips_atm_fw_regs_common.h"