package/kernel/lantiq/ltq-atm/src/ifxmips_atm_core.h

   1 /******************************************************************************
   2 **
   3 ** FILE NAME    : ifxmips_atm_core.h
   4 ** PROJECT      : UEIP
   5 ** MODULES      : ATM
   6 **
   7 ** DATE         : 7 Jul 2009
   8 ** AUTHOR       : Xu Liang
   9 ** DESCRIPTION  : ATM driver header file (core functions)
  10 ** COPYRIGHT    :       Copyright (c) 2006
  11 **                      Infineon Technologies AG
  12 **                      Am Campeon 1-12, 85579 Neubiberg, Germany
  13 **
  14 **    This program is free software; you can redistribute it and/or modify
  15 **    it under the terms of the GNU General Public License as published by
  16 **    the Free Software Foundation; either version 2 of the License, or
  17 **    (at your option) any later version.
  18 **
  19 ** HISTORY
  20 ** $Date        $Author         $Comment
  21 ** 17 JUN 2009  Xu Liang        Init Version
  22 *******************************************************************************/
  23
  24 #ifndef IFXMIPS_ATM_CORE_H
  25 #define IFXMIPS_ATM_CORE_H
  26
  27
  28 #define INT_NUM_IM2_IRL24       (INT_NUM_IM2_IRL0 + 24)
  29 #define INT_NUM_IM2_IRL13       (INT_NUM_IM2_IRL0 + 13)
  30 #define CONFIG_IFXMIPS_DSL_CPE_MEI
  31 #define IFX_REG_W32(_v, _r)               __raw_writel((_v), (volatile unsigned int *)(_r))
  32 #define IFX_REG_R32(_r)                    __raw_readl((volatile unsigned int *)(_r))
  33 #define IFX_REG_W32_MASK(_clr, _set, _r)   IFX_REG_W32((IFX_REG_R32((_r)) & ~(_clr)) | (_set), (_r))
  34 #define SET_BITS(x, msb, lsb, value)    (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb)))
  35
  36 struct ltq_atm_ops {
  37         void (*init)(struct platform_device *pdev);
  38         void (*shutdown)(void);
  39
  40         int (*start)(int pp32);
  41         void (*stop)(int pp32);
  42
  43         void (*fw_ver)(unsigned int *major, unsigned int *minor);
  44 };
  45
  46 #include <linux/atomic.h>
  47 #include <lantiq_atm.h>
  48
  49 /*
  50  * ####################################
  51  *              Definition
  52  * ####################################
  53  */
  54
  55 /*
  56  *  Compile Options
  57  */
  58
  59 #define ENABLE_DEBUG                    1
  60
  61 #define ENABLE_ASSERT                   1
  62
  63 #define INLINE
  64
  65 #define DEBUG_DUMP_SKB                  1
  66
  67 #define DEBUG_QOS                       1
  68
  69 #define DISABLE_QOS_WORKAROUND          0
  70
  71 #define ENABLE_DBG_PROC                 1
  72
  73 #define ENABLE_FW_PROC                  1
  74
  75 #ifdef CONFIG_IFX_ATM_TASKLET
  76   #define ENABLE_TASKLET                1
  77 #endif
  78
  79 #ifdef CONFIG_IFX_ATM_RETX
  80   #define ENABLE_ATM_RETX               1
  81 #endif
  82
  83 #if defined(CONFIG_DSL_MEI_CPE_DRV) && !defined(CONFIG_IFXMIPS_DSL_CPE_MEI)
  84   #define CONFIG_IFXMIPS_DSL_CPE_MEI    1
  85 #endif
  86
  87 /*
  88  *  Debug/Assert/Error Message
  89  */
  90
  91 #define ifx_atm_dbg_enable 1
  92
  93 #define DBG_ENABLE_MASK_ERR             (1 << 0)
  94 #define DBG_ENABLE_MASK_DEBUG_PRINT     (1 << 1)
  95 #define DBG_ENABLE_MASK_ASSERT          (1 << 2)
  96 #define DBG_ENABLE_MASK_DUMP_SKB_RX     (1 << 8)
  97 #define DBG_ENABLE_MASK_DUMP_SKB_TX     (1 << 9)
  98 #define DBG_ENABLE_MASK_DUMP_QOS        (1 << 10)
  99 #define DBG_ENABLE_MASK_DUMP_INIT       (1 << 11)
 100 #define DBG_ENABLE_MASK_MAC_SWAP        (1 << 12)
 101 #define DBG_ENABLE_MASK_ALL             (DBG_ENABLE_MASK_ERR | DBG_ENABLE_MASK_DEBUG_PRINT | DBG_ENABLE_MASK_ASSERT | DBG_ENABLE_MASK_DUMP_SKB_RX | DBG_ENABLE_MASK_DUMP_SKB_TX | DBG_ENABLE_MASK_DUMP_QOS | DBG_ENABLE_MASK_DUMP_INIT | DBG_ENABLE_MASK_MAC_SWAP)
 102
 103 #if defined(ENABLE_ASSERT) && ENABLE_ASSERT
 104   #define ASSERT(cond, format, arg...)  do { if ( (ifx_atm_dbg_enable & DBG_ENABLE_MASK_ASSERT) && !(cond) ) printk(KERN_ERR __FILE__ ":%d:%s: " format "\n", __LINE__, __FUNCTION__, ##arg); } while ( 0 )
 105 #else
 106   #define ASSERT(cond, format, arg...)
 107 #endif
 108
 109
 110 /*
 111  *  Constants
 112  */
 113 #define DEFAULT_TX_LINK_RATE            3200    //  in cells
 114
 115 /*
 116  *  ATM Port, QSB Queue, DMA RX/TX Channel Parameters
 117  */
 118 #define ATM_PORT_NUMBER                 2
 119 #define MAX_QUEUE_NUMBER                16
 120 #define OAM_RX_QUEUE                    15
 121 #define QSB_RESERVE_TX_QUEUE            0
 122 #define FIRST_QSB_QID                   1
 123 #define MAX_PVC_NUMBER                  (MAX_QUEUE_NUMBER - FIRST_QSB_QID)
 124 #define MAX_RX_DMA_CHANNEL_NUMBER       8
 125 #define MAX_TX_DMA_CHANNEL_NUMBER       16
 126 #define DATA_BUFFER_ALIGNMENT           EMA_ALIGNMENT
 127 #define DESC_ALIGNMENT                  8
 128 #define DEFAULT_RX_HUNT_BITTH           4
 129
 130 /*
 131  *  RX DMA Channel Allocation
 132  */
 133 #define RX_DMA_CH_OAM                   0
 134 #define RX_DMA_CH_AAL                   1
 135 #define RX_DMA_CH_TOTAL                 2
 136 #define RX_DMA_CH_OAM_DESC_LEN          32
 137 #define RX_DMA_CH_OAM_BUF_SIZE          ((CELL_SIZE + 14) & ~15)
 138 #define RX_DMA_CH_AAL_BUF_SIZE          (2048 - 48)
 139
 140 /*
 141  *  OAM Constants
 142  */
 143 #define OAM_HTU_ENTRY_NUMBER            3
 144 #define OAM_F4_SEG_HTU_ENTRY            0
 145 #define OAM_F4_TOT_HTU_ENTRY            1
 146 #define OAM_F5_HTU_ENTRY                2
 147 #define OAM_F4_CELL_ID                  0
 148 #define OAM_F5_CELL_ID                  15
 149 #if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX
 150   #undef  OAM_HTU_ENTRY_NUMBER
 151   #define OAM_HTU_ENTRY_NUMBER          4
 152   #define OAM_ARQ_HTU_ENTRY             3
 153 #endif
 154
 155 /*
 156  *  RX Frame Definitions
 157  */
 158 #define MAX_RX_PACKET_ALIGN_BYTES       3
 159 #define MAX_RX_PACKET_PADDING_BYTES     3
 160 #define RX_INBAND_TRAILER_LENGTH        8
 161 #define MAX_RX_FRAME_EXTRA_BYTES        (RX_INBAND_TRAILER_LENGTH + MAX_RX_PACKET_ALIGN_BYTES + MAX_RX_PACKET_PADDING_BYTES)
 162
 163 /*
 164  *  TX Frame Definitions
 165  */
 166 #define MAX_TX_HEADER_ALIGN_BYTES       12
 167 #define MAX_TX_PACKET_ALIGN_BYTES       3
 168 #define MAX_TX_PACKET_PADDING_BYTES     3
 169 #define TX_INBAND_HEADER_LENGTH         8
 170 #define MAX_TX_FRAME_EXTRA_BYTES        (TX_INBAND_HEADER_LENGTH + MAX_TX_HEADER_ALIGN_BYTES + MAX_TX_PACKET_ALIGN_BYTES + MAX_TX_PACKET_PADDING_BYTES)
 171
 172 #define CELL_SIZE                       ATM_AAL0_SDU
 173
 174 #if defined(ENABLE_ATM_RETX) && ENABLE_ATM_RETX
 175   #define RETX_PLAYOUT_BUFFER_ORDER     6
 176   #define RETX_PLAYOUT_BUFFER_SIZE      (PAGE_SIZE * (1 << RETX_PLAYOUT_BUFFER_ORDER))
 177   #define RETX_PLAYOUT_FW_BUFF_SIZE     (RETX_PLAYOUT_BUFFER_SIZE / (32 * 56 /* cell size */))
 178   #define RETX_POLLING_INTERVAL         (HZ / 100 > 0 ? HZ / 100 : 1)
 179 #endif
 180
 181 typedef struct {
 182         unsigned int h;
 183         unsigned int l;
 184 } ppe_u64_t;
 185
 186 struct port {
 187         unsigned int tx_max_cell_rate;
 188         unsigned int tx_current_cell_rate;
 189
 190         struct atm_dev *dev;
 191 };
 192
 193 struct connection {
 194         struct atm_vcc         *vcc;
 195
 196         volatile struct tx_descriptor *tx_desc;
 197         unsigned int tx_desc_pos;
 198         struct sk_buff **tx_skb;
 199         spinlock_t lock;
 200
 201         unsigned int aal5_vcc_crc_err; /* number of packets with CRC error */
 202         unsigned int aal5_vcc_oversize_sdu; /* number of packets with oversize error */
 203
 204         unsigned int port;
 205 };
 206
 207 struct atm_priv_data {
 208         unsigned long conn_table;
 209         struct connection conn[MAX_PVC_NUMBER];
 210
 211         volatile struct rx_descriptor *aal_desc;
 212         unsigned int aal_desc_pos;
 213
 214         volatile struct rx_descriptor *oam_desc;
 215         unsigned char *oam_buf;
 216         unsigned int oam_desc_pos;
 217
 218         struct port port[ATM_PORT_NUMBER];
 219
 220         unsigned int wrx_pdu;        /*  successfully received AAL5 packet       */
 221         unsigned int wrx_drop_pdu;   /*  AAL5 packet dropped by driver on RX     */
 222         unsigned int wtx_pdu;        /*  successfully transmitted AAL5 packet    */
 223         unsigned int wtx_err_pdu;    /*  error AAL5 packet                       */
 224         unsigned int wtx_drop_pdu;   /*  AAL5 packet dropped by driver on TX     */
 225
 226         unsigned int wrx_oam;        /*  successfully received OAM cell          */
 227         unsigned int wrx_drop_oam;   /*  OAM cell dropped by driver on RX        */
 228         unsigned int wtx_oam;        /*  successfully transmitted OAM cell       */
 229         unsigned int wtx_err_oam;    /*  error during transmiting OAM cell       */
 230         unsigned int wtx_drop_oam;   /*  OAM cell dropped by driver on TX        */
 231
 232         ppe_u64_t wrx_total_byte;
 233         ppe_u64_t wtx_total_byte;
 234         unsigned int prev_wrx_total_byte;
 235         unsigned int prev_wtx_total_byte;
 236
 237         void *aal_desc_base;
 238         void *oam_desc_base;
 239         void *oam_buf_base;
 240         void *tx_desc_base;
 241         void *tx_skb_base;
 242 };
 243
 244 #include "ifxmips_atm_ppe_common.h"
 245 #include "ifxmips_atm_fw_regs_common.h"
 246
 247 #endif