1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 #include <dt-bindings/clock/ath79-clk.h>
6 compatible = "qca,qca9550";
17 compatible = "mips,mips74Kc";
18 clocks = <&pll ATH79_CLK_CPU>;
24 compatible = "fixed-clock";
26 clock-output-names = "ref";
27 clock-frequency = <40000000>;
32 ddr_ctrl: memory-controller@18000000 {
33 compatible = "qca,qca9550-ddr-controller",
34 "qca,ar7240-ddr-controller";
35 reg = <0x18000000 0x100>;
37 #qca,ddr-wb-channel-cells = <1>;
41 compatible = "ns16550a";
42 reg = <0x18020000 0x20>;
46 clocks = <&pll ATH79_CLK_REF>;
56 usb_phy0: usb-phy0@18030000 {
57 compatible ="qca,qca9550-usb-phy", "qca,ar7200-usb-phy";
58 reg = <0x18030000 4>, <0x18030004 4>;
60 reset-names = "usb-phy", "usb-suspend-override";
61 resets = <&rst 4>, <&rst 3>;
68 usb_phy1: usb-phy1@18030010 {
69 compatible = "qca,qca9550-usb-phy", "qca,ar7200-usb-phy";
70 reg = <0x18030010 4>, <0x18030014 4>;
72 reset-names = "usb-phy", "usb-suspend-override";
73 resets = <&rst2 4>, <&rst2 3>;
81 compatible = "qca,qca9550-gpio",
83 reg = <0x18040000 0x28>;
92 #interrupt-cells = <2>;
95 pinmux: pinmux@1804002c {
96 compatible = "pinctrl-single";
98 reg = <0x1804002c 0x44>;
102 pinctrl-single,bit-per-mux;
103 pinctrl-single,register-width = <32>;
104 pinctrl-single,function-mask = <0x1>;
105 #pinctrl-cells = <2>;
107 jtag_disable_pins: pinmux_jtag_disable_pins {
108 pinctrl-single,bits = <0x40 0x2 0x2>;
112 pll: pll-controller@18050000 {
113 compatible = "qca,qca9550-pll",
114 "qca,qca9550-pll", "syscon";
115 reg = <0x18050000 0x50>;
118 clock-output-names = "cpu", "ddr", "ahb";
124 compatible = "qca,ar7130-wdt";
125 reg = <0x18060008 0x8>;
129 clocks = <&pll ATH79_CLK_AHB>;
133 rst: reset-controller@1806001c {
134 compatible = "qca,qca9550-reset",
136 reg = <0x1806001c 0x4>;
139 interrupt-parent = <&cpuintc>;
141 intc2: interrupt-controller2 {
142 compatible = "qca,ar9340-intc";
144 interrupt-parent = <&cpuintc>;
147 interrupt-controller;
148 #interrupt-cells = <1>;
150 qca,int-status-addr = <0xac>;
151 qca,pending-bits = <0xf>, /* wmac */
152 <0x1f0>; /* pcie rc 0 */
155 intc3: interrupt-controller3 {
156 compatible = "qca,ar9340-intc";
158 interrupt-parent = <&cpuintc>;
161 interrupt-controller;
162 #interrupt-cells = <1>;
164 qca,int-status-addr = <0xac>;
165 qca,pending-bits = <0x1f000>, /* pcie rc 1 */
166 <0x1000000>, /* usb1 */
167 <0x10000000>; /* usb2 */
171 rst2: reset-controller@180600c0 {
172 compatible = "qca,qca9550-reset",
175 reg = <0x180600c0 0x4>;
181 nand: nand@1b800200 {
182 compatible = "qca,ar934x-nand";
183 reg = <0x1b800200 0xb8>;
186 interrupt-parent = <&miscintc>;
189 reset-names = "nand";
191 nand-ecc-mode = "hw";
193 #address-cells = <1>;
199 gmac: gmac@18070000 {
200 compatible = "qca,qca9550-gmac";
201 reg = <0x18070000 0x58>;
204 pcie0: pcie-controller@180c0000 {
205 compatible = "qcom,qca9550-pci", "qcom,ar7240-pci";
206 #address-cells = <3>;
208 bus-range = <0x0 0x0>;
209 reg = <0x180c0000 0x1000>, /* CRP */
210 <0x180f0000 0x100>, /* CTRL */
211 <0x14000000 0x1000>; /* CFG */
212 reg-names = "crp_base", "ctrl_base", "cfg_base";
213 ranges = <0x2000000 0 0x10000000 0x10000000 0 0x02000000 /* pci memory */
214 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
215 interrupt-parent = <&intc2>;
218 resets = <&rst 6>, <&rst 7>;
219 reset-names = "hc", "phy";
221 interrupt-controller;
222 #interrupt-cells = <1>;
224 interrupt-map-mask = <0 0 0 1>;
225 interrupt-map = <0 0 0 0 &pcie0 0>;
229 wmac: wmac@18100000 {
230 compatible = "qca,qca9550-wmac";
231 reg = <0x18100000 0x10000>;
233 interrupt-parent = <&intc2>;
239 pcie1: pcie-controller@18250000 {
240 compatible = "qcom,qca9550-pci", "qcom,ar7240-pci";
241 #address-cells = <3>;
243 bus-range = <0x0 0x0>;
244 reg = <0x18250000 0x1000>, /* CRP */
245 <0x18280000 0x100>, /* CTRL */
246 <0x16000000 0x1000>; /* CFG */
247 reg-names = "crp_base", "ctrl_base", "cfg_base";
248 ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */
249 0x1000000 0 0x00000000 0x0000001 0 0x000001>; /* io space */
250 interrupt-parent = <&intc3>;
253 resets = <&rst2 6>, <&rst2 7>;
254 reset-names = "hc", "phy";
256 interrupt-controller;
257 #interrupt-cells = <1>;
259 interrupt-map-mask = <0 0 0 1>;
260 interrupt-map = <0 0 0 0 &pcie1 0>;
265 compatible = "generic-ehci";
266 reg = <0x1b000000 0x1fc>;
268 interrupt-parent = <&intc3>;
271 reset-names = "usb-host";
273 has-transaction-translator;
274 caps-offset = <0x100>;
276 phy-names = "usb-phy0";
283 compatible = "generic-ehci";
284 reg = <0x1b400000 0x1fc>;
286 interrupt-parent = <&intc3>;
289 reset-names = "usb-host";
291 has-transaction-translator;
292 caps-offset = <0x100>;
294 phy-names = "usb-phy1";
301 compatible = "qca,ar934x-spi";
302 reg = <0x1f000000 0x1c>;
304 clocks = <&pll ATH79_CLK_AHB>;
308 #address-cells = <1>;
315 compatible = "qca,ar9340-mdio";
319 compatible = "qca,qca9550-eth", "syscon";
321 pll-reg = <0 0x28 0>;
324 pll-data = <0x16000000 0x00000101 0x00001616>;
327 resets = <&rst 9>, <&rst 22>;
328 reset-names = "mac", "mdio";
332 compatible = "qca,ar9340-mdio";
336 compatible = "qca,qca9550-eth", "syscon";
338 pll-reg = <0 0x48 0>;
341 pll-data = <0x16000000 0x00000101 0x00001616>;
344 resets = <&rst 13>, <&rst 23>;
345 reset-names = "mac", "mdio";