1 From 74631102645df8984acbdf67b731e4d437f27fed Mon Sep 17 00:00:00 2001
2 From: Linus Walleij <linus.walleij@linaro.org>
3 Date: Thu, 11 Oct 2018 20:06:23 +0200
4 Subject: [PATCH 08/18] ARM: dts: Enable Gemini flash access
6 Some Gemini platforms have a parallel NOR flash which conflicts
7 with use cases reusing some of the flash lines (such as CE1)
10 Fix this on the D-Link DIR-685 and Itian SQ201 by creating
11 "enabled" and "disabled" states for the flash pin control
12 handle, and rely on the flash handling code to switch this
13 in and out when accessed so these lines can be used
14 for GPIO when flash is not accessed, and enable flash
17 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
19 arch/arm/boot/dts/gemini-dlink-dir-685.dts | 35 +++++++++++++++-------
20 arch/arm/boot/dts/gemini-sq201.dts | 31 ++++++++++---------
21 2 files changed, 41 insertions(+), 25 deletions(-)
23 diff --git a/arch/arm/boot/dts/gemini-dlink-dir-685.dts b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
24 index 502a361d1fe9..318e9b2ba7dc 100644
25 --- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
26 +++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
28 gpio-sck = <&gpio1 5 GPIO_ACTIVE_HIGH>;
29 gpio-miso = <&gpio1 8 GPIO_ACTIVE_HIGH>;
30 gpio-mosi = <&gpio1 7 GPIO_ACTIVE_HIGH>;
31 - /* Collides with pflash CE1, not so cool */
32 cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
33 num-chipselects = <1>;
39 - * Flash access is by default disabled, because it
40 - * collides with the Chip Enable signal for the display
41 - * panel, that reuse the parallel flash Chip Select 1
42 - * (CS1). Enabling flash makes graphics stop working.
44 - * We might be able to hack around this by letting
45 - * GPIO poke around in the flash controller registers.
46 + * Flash access collides with the Chip Enable signal for
47 + * the display panel, that reuse the parallel flash Chip
48 + * Select 1 (CS1). We switch the pin control state so we
49 + * enable these pins for flash access only when we need
50 + * then, and when disabled they can be used for GPIO which
51 + * is what the display panel needs.
53 - /* status = "okay"; */
55 + pinctrl-names = "enabled", "disabled";
56 + pinctrl-0 = <&pflash_default_pins>;
57 + pinctrl-1 = <&pflash_disabled_pins>;
60 reg = <0x30000000 0x02000000>;
75 + * These GPIO groups will be mapped in over some
76 + * of the flash pins when the flash is not in
79 + pflash_disabled_pins: pinctrl-pflash-disabled {
82 + groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",
92 display-controller@6a000000 {
94 + status = "disabled";
98 diff --git a/arch/arm/boot/dts/gemini-sq201.dts b/arch/arm/boot/dts/gemini-sq201.dts
99 index 66e2845a3edb..79df6ce5bc6a 100644
100 --- a/arch/arm/boot/dts/gemini-sq201.dts
101 +++ b/arch/arm/boot/dts/gemini-sq201.dts
103 compatible = "gpio-leds";
105 label = "sq201:green:info";
106 - /* Conflict with parallel flash */
107 gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
108 default-state = "on";
109 linux,default-trigger = "heartbeat";
112 label = "sq201:green:usb";
113 - /* Conflict with parallel and NAND flash */
114 gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
115 default-state = "off";
116 linux,default-trigger = "usb-host";
117 @@ -126,15 +124,10 @@
122 - * Flash access can be enabled, with the side effect
123 - * of disabling access to GPIO LED on GPIO0[20] which
124 - * reuse one of the parallel flash chip select lines.
125 - * Also the default firmware on the machine has the
126 - * problem that since it uses the flash, the two LEDS
127 - * on the right become numb.
129 - /* status = "okay"; */
131 + pinctrl-names = "enabled", "disabled";
132 + pinctrl-0 = <&pflash_default_pins>;
133 + pinctrl-1 = <&pflash_disabled_pins>;
135 reg = <0x30000000 0x01000000>;
140 groups = "gpio0fgrp",
149 groups = "gpio1dgrp";
153 + * These GPIO groups will be mapped in over some
154 + * of the flash pins when the flash is not in
157 + pflash_disabled_pins: pinctrl-pflash-disabled {
159 + function = "gpio0";
160 + groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",