target/linux/gemini/patches-4.19/0008-ARM-dts-Enable-Gemini-flash-access.patch

   1 From 74631102645df8984acbdf67b731e4d437f27fed Mon Sep 17 00:00:00 2001
   2 From: Linus Walleij <linus.walleij@linaro.org>
   3 Date: Thu, 11 Oct 2018 20:06:23 +0200
   4 Subject: [PATCH 08/18] ARM: dts: Enable Gemini flash access
   5
   6 Some Gemini platforms have a parallel NOR flash which conflicts
   7 with use cases reusing some of the flash lines (such as CE1)
   8 for GPIO.
   9
  10 Fix this on the D-Link DIR-685 and Itian SQ201 by creating
  11 "enabled" and "disabled" states for the flash pin control
  12 handle, and rely on the flash handling code to switch this
  13 in and out when accessed so these lines can be used
  14 for GPIO when flash is not accessed, and enable flash
  15 access.
  16
  17 Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
  18 ---
  19  arch/arm/boot/dts/gemini-dlink-dir-685.dts | 35 +++++++++++++++-------
  20  arch/arm/boot/dts/gemini-sq201.dts         | 31 ++++++++++---------
  21  2 files changed, 41 insertions(+), 25 deletions(-)
  22
  23 diff --git a/arch/arm/boot/dts/gemini-dlink-dir-685.dts b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
  24 index 502a361d1fe9..318e9b2ba7dc 100644
  25 --- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
  26 +++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
  27 @@ -64,7 +64,6 @@
  28                 gpio-sck = <&gpio1 5 GPIO_ACTIVE_HIGH>;
  29                 gpio-miso = <&gpio1 8 GPIO_ACTIVE_HIGH>;
  30                 gpio-mosi = <&gpio1 7 GPIO_ACTIVE_HIGH>;
  31 -               /* Collides with pflash CE1, not so cool */
  32                 cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
  33                 num-chipselects = <1>;
  34
  35 @@ -253,15 +252,18 @@
  36         soc {
  37                 flash@30000000 {
  38                         /*
  39 -                        * Flash access is by default disabled, because it
  40 -                        * collides with the Chip Enable signal for the display
  41 -                        * panel, that reuse the parallel flash Chip Select 1
  42 -                        * (CS1). Enabling flash makes graphics stop working.
  43 -                        *
  44 -                        * We might be able to hack around this by letting
  45 -                        * GPIO poke around in the flash controller registers.
  46 +                        * Flash access collides with the Chip Enable signal for
  47 +                        * the display panel, that reuse the parallel flash Chip
  48 +                        * Select 1 (CS1). We switch the pin control state so we
  49 +                        * enable these pins for flash access only when we need
  50 +                        * then, and when disabled they can be used for GPIO which
  51 +                        * is what the display panel needs.
  52                          */
  53 -                       /* status = "okay"; */
  54 +                       status = "okay";
  55 +                       pinctrl-names = "enabled", "disabled";
  56 +                       pinctrl-0 = <&pflash_default_pins>;
  57 +                       pinctrl-1 = <&pflash_disabled_pins>;
  58 +
  59                         /* 32MB of flash */
  60                         reg = <0x30000000 0x02000000>;
  61
  62 @@ -327,7 +329,6 @@
  63                                                 "gpio0cgrp",
  64                                                 "gpio0egrp",
  65                                                 "gpio0fgrp",
  66 -                                               "gpio0ggrp",
  67                                                 "gpio0hgrp";
  68                                         };
  69                                 };
  70 @@ -342,6 +343,18 @@
  71                                                 groups = "gpio1bgrp";
  72                                         };
  73                                 };
  74 +                               /*
  75 +                                * These GPIO groups will be mapped in over some
  76 +                                * of the flash pins when the flash is not in
  77 +                                * active use.
  78 +                                */
  79 +                               pflash_disabled_pins: pinctrl-pflash-disabled {
  80 +                                       mux {
  81 +                                               function = "gpio0";
  82 +                                               groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",
  83 +                                                        "gpio0kgrp";
  84 +                                       };
  85 +                               };
  86                                 pinctrl-gmii {
  87                                         mux {
  88                                                 function = "gmii";
  89 @@ -430,7 +443,7 @@
  90                 };
  91
  92                 display-controller@6a000000 {
  93 -                       status = "okay";
  94 +                       status = "disabled";
  95
  96                         port@0 {
  97                                 reg = <0>;
  98 diff --git a/arch/arm/boot/dts/gemini-sq201.dts b/arch/arm/boot/dts/gemini-sq201.dts
  99 index 66e2845a3edb..79df6ce5bc6a 100644
 100 --- a/arch/arm/boot/dts/gemini-sq201.dts
 101 +++ b/arch/arm/boot/dts/gemini-sq201.dts
 102 @@ -41,14 +41,12 @@
 103                 compatible = "gpio-leds";
 104                 led-green-info {
 105                         label = "sq201:green:info";
 106 -                       /* Conflict with parallel flash */
 107                         gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
 108                         default-state = "on";
 109                         linux,default-trigger = "heartbeat";
 110                 };
 111                 led-green-usb {
 112                         label = "sq201:green:usb";
 113 -                       /* Conflict with parallel and NAND flash */
 114                         gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
 115                         default-state = "off";
 116                         linux,default-trigger = "usb-host";
 117 @@ -126,15 +124,10 @@
 118
 119         soc {
 120                 flash@30000000 {
 121 -                       /*
 122 -                        * Flash access can be enabled, with the side effect
 123 -                        * of disabling access to GPIO LED on GPIO0[20] which
 124 -                        * reuse one of the parallel flash chip select lines.
 125 -                        * Also the default firmware on the machine has the
 126 -                        * problem that since it uses the flash, the two LEDS
 127 -                        * on the right become numb.
 128 -                        */
 129 -                       /* status = "okay"; */
 130 +                       status = "okay";
 131 +                       pinctrl-names = "enabled", "disabled";
 132 +                       pinctrl-0 = <&pflash_default_pins>;
 133 +                       pinctrl-1 = <&pflash_disabled_pins>;
 134                         /* 16MB of flash */
 135                         reg = <0x30000000 0x01000000>;
 136
 137 @@ -184,9 +177,7 @@
 138                                         mux {
 139                                                 function = "gpio0";
 140                                                 groups = "gpio0fgrp",
 141 -                                               "gpio0ggrp",
 142 -                                               "gpio0hgrp",
 143 -                                               "gpio0kgrp";
 144 +                                               "gpio0hgrp";
 145                                         };
 146                                 };
 147                                 /*
 148 @@ -199,6 +190,18 @@
 149                                                 groups = "gpio1dgrp";
 150                                         };
 151                                 };
 152 +                               /*
 153 +                                * These GPIO groups will be mapped in over some
 154 +                                * of the flash pins when the flash is not in
 155 +                                * active use.
 156 +                                */
 157 +                               pflash_disabled_pins: pinctrl-pflash-disabled {
 158 +                                       mux {
 159 +                                               function = "gpio0";
 160 +                                               groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",
 161 +                                                        "gpio0kgrp";
 162 +                                       };
 163 +                               };
 164                                 pinctrl-gmii {
 165                                         mux {
 166                                                 function = "gmii";
 167 --
 168 2.19.2
 169