1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
3 // Copyright (c) 2022, Giammarco Marzano <stich86@gmail.com>.
5 #include "qcom-ipq4019.dtsi"
6 #include <dt-bindings/soc/qcom,tcsr.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
13 compatible = "zte,mf289f";
16 led-boot = &led_status;
17 led-failsafe = &led_status;
18 led-running = &led_status;
19 led-upgrade = &led_status;
24 * bootargs forced by u-boot bootipq command:
25 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
27 bootargs-append = " root=/dev/ubiblock0_1";
31 * This node is used to restart modem module to avoid anomalous
32 * behaviours on initial communication.
35 compatible = "gpio-restart";
36 gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
40 compatible = "gpio-leds";
44 function = LED_FUNCTION_POWER;
45 color = <LED_COLOR_ID_BLUE>;
46 gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
50 function = LED_FUNCTION_WLAN;
51 color = <LED_COLOR_ID_BLUE>;
52 gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
53 linux,default-trigger = "phy0tpt";
58 compatible = "gpio-keys";
62 linux,code = <KEY_RESTART>;
63 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
68 linux,code = <KEY_WPS_BUTTON>;
69 gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
79 compatible = "qcom,tcsr";
80 reg = <0x1949000 0x100>;
81 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
86 compatible = "qcom,tcsr";
87 reg = <0x194b000 0x100>;
88 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
93 compatible = "qcom,tcsr";
94 reg = <0x1953000 0x1000>;
95 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
99 compatible = "qcom,tcsr";
100 reg = <0x1957000 0x100>;
101 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
120 pinctrl-0 = <&mdio_pins>;
121 pinctrl-names = "default";
122 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
123 reset-delay-us = <2000>;
143 pinctrl-0 = <&spi_0_pins>;
144 pinctrl-names = "default";
146 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>,
147 <&tlmm 54 GPIO_ACTIVE_HIGH>;
150 compatible = "jedec,spi-nor";
151 #address-cells = <1>;
154 spi-max-frequency = <24000000>;
157 compatible = "fixed-partitions";
158 #address-cells = <1>;
169 reg = <0x40000 0x20000>;
175 reg = <0x60000 0x60000>;
181 reg = <0xc0000 0x10000>;
186 label = "0:DDRPARAMS";
187 reg = <0xd0000 0x10000>;
192 label = "0:APPSBLENV";
193 reg = <0xe0000 0x10000>;
199 reg = <0xf0000 0xc0000>;
204 label = "0:reserved1";
205 reg = <0x1b0000 0x50000>;
211 spi-nand@1 { /* flash@1 ? */
212 compatible = "spi-nand";
214 spi-max-frequency = <24000000>;
217 compatible = "fixed-partitions";
218 #address-cells = <1>;
229 reg = <0xa0000 0x80000>;
231 compatible = "nvmem-cells";
232 #address-cells = <1>;
235 precal_art_1000: precal@1000 {
236 reg = <0x1000 0x2f20>;
239 precal_art_5000: precal@5000 {
240 reg = <0x5000 0x2f20>;
246 reg = <0x120000 0x80000>;
248 compatible = "nvmem-cells";
249 #address-cells = <1>;
252 macaddr_mac_0: macaddr@0 {
259 reg = <0x1a0000 0xc0000>;
265 reg = <0x260000 0x400000>;
271 reg = <0x660000 0x400000>;
276 reg = <0xa60000 0xa0000>;
281 reg = <0xb00000 0x500000>;
287 reg = <0x1000000 0x800000>;
292 reg = <0x1800000 0x1d00000>;
297 reg = <0x3500000 0x1900000>;
302 reg = <0x4e00000 0x3200000>;
309 pinctrl-0 = <&serial_pins>;
310 pinctrl-names = "default";
323 nvmem-cell-names = "mac-address";
324 nvmem-cells = <&macaddr_mac_0>;
328 nvmem-cell-names = "mac-address";
329 nvmem-cells = <&macaddr_mac_0>;
330 mac-address-increment = <1>;
339 i2c_0_pins: i2c_0_pinmux {
341 pins = "gpio20", "gpio21";
342 function = "blsp_i2c0";
347 mdio_pins: mdio_pinmux {
361 serial_pins: serial_pinmux {
363 pins = "gpio16", "gpio17";
364 function = "blsp_uart0";
369 spi_0_pins: spi_0_pinmux {
371 function = "blsp_spi0";
372 pins = "gpio13", "gpio14", "gpio15";
373 drive-strength = <12>;
379 pins = "gpio12", "gpio54";
380 drive-strength = <2>;
401 nvmem-cell-names = "pre-calibration", "mac-address";
402 nvmem-cells = <&precal_art_1000>, <&macaddr_mac_0>;
403 mac-address-increment = <2>;
404 qcom,ath10k-calibration-variant = "zte,mf289f";
407 /* This node is used only on AT2 version for 5Ghz on IPQ4019 with board-id=21 */
410 nvmem-cell-names = "pre-calibration", "mac-address";
411 nvmem-cells = <&precal_art_5000>, <&macaddr_mac_0>;
412 mac-address-increment = <3>;
413 qcom,ath10k-calibration-variant = "zte,mf289f";
416 /* This node is used only on AT1 version for 5Ghz on QCA9984 */
419 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
420 wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
421 clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>;
424 reg = <0x00000000 0 0 0 0>;
425 #address-cells = <3>;
430 nvmem-cell-names = "mac-address";
431 nvmem-cells = <&macaddr_mac_0>;
432 mac-address-increment = <4>;
433 compatible = "qcom,ath10k";
434 reg = <0x00010000 0 0 0 0>;
435 qcom,ath10k-calibration-variant = "zte,mf289f";