ipq40xx: Add ZTE MF289F
[openwrt/openwrt.git] / target / linux / ipq40xx / files / arch / arm / boot / dts / qcom-ipq4019-mf289f.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 // Copyright (c) 2022, Pawel Dembicki <paweldembicki@gmail.com>.
3 // Copyright (c) 2022, Giammarco Marzano <stich86@gmail.com>.
4
5 #include "qcom-ipq4019.dtsi"
6 #include <dt-bindings/soc/qcom,tcsr.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10
11 / {
12 model = "ZTE MF289F";
13 compatible = "zte,mf289f";
14
15 aliases {
16 led-boot = &led_status;
17 led-failsafe = &led_status;
18 led-running = &led_status;
19 led-upgrade = &led_status;
20 };
21
22 chosen {
23 /*
24 * bootargs forced by u-boot bootipq command:
25 * 'ubi.mtd=rootfs root=mtd:ubi_rootfs rootfstype=squashfs rootwait'
26 */
27 bootargs-append = " root=/dev/ubiblock0_1";
28 };
29
30 /*
31 * This node is used to restart modem module to avoid anomalous
32 * behaviours on initial communication.
33 */
34 gpio-restart {
35 compatible = "gpio-restart";
36 gpios = <&tlmm 8 GPIO_ACTIVE_HIGH>;
37 };
38
39 leds {
40 compatible = "gpio-leds";
41
42 led_status: led-0 {
43 label = "blue:power";
44 function = LED_FUNCTION_POWER;
45 color = <LED_COLOR_ID_BLUE>;
46 gpios = <&tlmm 10 GPIO_ACTIVE_LOW>;
47 };
48
49 led-1 {
50 function = LED_FUNCTION_WLAN;
51 color = <LED_COLOR_ID_BLUE>;
52 gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
53 linux,default-trigger = "phy0tpt";
54 };
55 };
56
57 keys {
58 compatible = "gpio-keys";
59
60 key-reset {
61 label = "reset";
62 linux,code = <KEY_RESTART>;
63 gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
64 };
65
66 key-wps {
67 label = "wps";
68 linux,code = <KEY_WPS_BUTTON>;
69 gpios = <&tlmm 68 GPIO_ACTIVE_LOW>;
70 };
71 };
72
73 soc {
74 ess-psgmii@98000 {
75 status = "okay";
76 };
77
78 tcsr@1949000 {
79 compatible = "qcom,tcsr";
80 reg = <0x1949000 0x100>;
81 qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
82 };
83
84 tcsr@194b000 {
85 /* select hostmode */
86 compatible = "qcom,tcsr";
87 reg = <0x194b000 0x100>;
88 qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
89 status = "okay";
90 };
91
92 ess_tcsr@1953000 {
93 compatible = "qcom,tcsr";
94 reg = <0x1953000 0x1000>;
95 qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
96 };
97
98 tcsr@1957000 {
99 compatible = "qcom,tcsr";
100 reg = <0x1957000 0x100>;
101 qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
102 };
103
104 ess-switch@c000000 {
105 status = "okay";
106 };
107
108 edma@c080000 {
109 status = "okay";
110 };
111 };
112 };
113
114 &prng {
115 status = "okay";
116 };
117
118 &mdio {
119 status = "okay";
120 pinctrl-0 = <&mdio_pins>;
121 pinctrl-names = "default";
122 reset-gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
123 reset-delay-us = <2000>;
124 };
125
126 &watchdog {
127 status = "okay";
128 };
129
130 &blsp_dma {
131 status = "okay";
132 };
133
134 &usb2 {
135 status = "okay";
136 };
137
138 &usb3 {
139 status = "okay";
140 };
141
142 &blsp1_spi1 {
143 pinctrl-0 = <&spi_0_pins>;
144 pinctrl-names = "default";
145 status = "okay";
146 cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>,
147 <&tlmm 54 GPIO_ACTIVE_HIGH>;
148
149 flash@0 {
150 compatible = "jedec,spi-nor";
151 #address-cells = <1>;
152 #size-cells = <1>;
153 reg = <0>;
154 spi-max-frequency = <24000000>;
155
156 partitions {
157 compatible = "fixed-partitions";
158 #address-cells = <1>;
159 #size-cells = <1>;
160
161 partition@0 {
162 label = "0:SBL1";
163 reg = <0x0 0x40000>;
164 read-only;
165 };
166
167 partition@40000 {
168 label = "0:MIBIB";
169 reg = <0x40000 0x20000>;
170 read-only;
171 };
172
173 partition@60000 {
174 label = "0:QSEE";
175 reg = <0x60000 0x60000>;
176 read-only;
177 };
178
179 partition@c0000 {
180 label = "0:CDT";
181 reg = <0xc0000 0x10000>;
182 read-only;
183 };
184
185 partition@d0000 {
186 label = "0:DDRPARAMS";
187 reg = <0xd0000 0x10000>;
188 read-only;
189 };
190
191 partition@e0000 {
192 label = "0:APPSBLENV";
193 reg = <0xe0000 0x10000>;
194 read-only;
195 };
196
197 partition@f0000 {
198 label = "0:APPSBL";
199 reg = <0xf0000 0xc0000>;
200 read-only;
201 };
202
203 partition@1b0000 {
204 label = "0:reserved1";
205 reg = <0x1b0000 0x50000>;
206 read-only;
207 };
208 };
209 };
210
211 spi-nand@1 { /* flash@1 ? */
212 compatible = "spi-nand";
213 reg = <1>;
214 spi-max-frequency = <24000000>;
215
216 partitions {
217 compatible = "fixed-partitions";
218 #address-cells = <1>;
219 #size-cells = <1>;
220
221 partition@0 {
222 label = "fota-flag";
223 reg = <0x0 0xa0000>;
224 read-only;
225 };
226
227 partition@a0000 {
228 label = "ART";
229 reg = <0xa0000 0x80000>;
230 read-only;
231 compatible = "nvmem-cells";
232 #address-cells = <1>;
233 #size-cells = <1>;
234
235 precal_art_1000: precal@1000 {
236 reg = <0x1000 0x2f20>;
237 };
238
239 precal_art_5000: precal@5000 {
240 reg = <0x5000 0x2f20>;
241 };
242 };
243
244 partition@120000 {
245 label = "mac";
246 reg = <0x120000 0x80000>;
247 read-only;
248 compatible = "nvmem-cells";
249 #address-cells = <1>;
250 #size-cells = <1>;
251
252 macaddr_mac_0: macaddr@0 {
253 reg = <0x0 0x6>;
254 };
255 };
256
257 partition@1a0000 {
258 label = "reserved2";
259 reg = <0x1a0000 0xc0000>;
260 read-only;
261 };
262
263 partition@260000 {
264 label = "cfg-param";
265 reg = <0x260000 0x400000>;
266 read-only;
267 };
268
269 partition@660000 {
270 label = "log";
271 reg = <0x660000 0x400000>;
272 };
273
274 partition@a60000 {
275 label = "oops";
276 reg = <0xa60000 0xa0000>;
277 };
278
279 partition@b00000 {
280 label = "reserved3";
281 reg = <0xb00000 0x500000>;
282 read-only;
283 };
284
285 partition@1000000 {
286 label = "web";
287 reg = <0x1000000 0x800000>;
288 };
289
290 partition@1800000 {
291 label = "rootfs";
292 reg = <0x1800000 0x1d00000>;
293 };
294
295 partition@3500000 {
296 label = "data";
297 reg = <0x3500000 0x1900000>;
298 };
299
300 partition@4e00000 {
301 label = "fota";
302 reg = <0x4e00000 0x3200000>;
303 };
304 };
305 };
306 };
307
308 &blsp1_uart1 {
309 pinctrl-0 = <&serial_pins>;
310 pinctrl-names = "default";
311 status = "okay";
312 };
313
314 &crypto {
315 status = "okay";
316 };
317
318 &cryptobam {
319 status = "okay";
320 };
321
322 &gmac0 {
323 nvmem-cell-names = "mac-address";
324 nvmem-cells = <&macaddr_mac_0>;
325 };
326
327 &gmac1 {
328 nvmem-cell-names = "mac-address";
329 nvmem-cells = <&macaddr_mac_0>;
330 mac-address-increment = <1>;
331 };
332
333
334 &qpic_bam {
335 status = "okay";
336 };
337
338 &tlmm {
339 i2c_0_pins: i2c_0_pinmux {
340 mux {
341 pins = "gpio20", "gpio21";
342 function = "blsp_i2c0";
343 bias-disable;
344 };
345 };
346
347 mdio_pins: mdio_pinmux {
348 mux_1 {
349 pins = "gpio6";
350 function = "mdio";
351 bias-pull-up;
352 };
353
354 mux_2 {
355 pins = "gpio7";
356 function = "mdc";
357 bias-pull-up;
358 };
359 };
360
361 serial_pins: serial_pinmux {
362 mux {
363 pins = "gpio16", "gpio17";
364 function = "blsp_uart0";
365 bias-disable;
366 };
367 };
368
369 spi_0_pins: spi_0_pinmux {
370 pinmux {
371 function = "blsp_spi0";
372 pins = "gpio13", "gpio14", "gpio15";
373 drive-strength = <12>;
374 bias-disable;
375 };
376
377 pinmux_cs {
378 function = "gpio";
379 pins = "gpio12", "gpio54";
380 drive-strength = <2>;
381 bias-disable;
382 output-high;
383 };
384 };
385 };
386
387 &usb2_hs_phy {
388 status = "okay";
389 };
390
391 &usb3_ss_phy {
392 status = "okay";
393 };
394
395 &usb3_hs_phy {
396 status = "okay";
397 };
398
399 &wifi0 {
400 status = "okay";
401 nvmem-cell-names = "pre-calibration", "mac-address";
402 nvmem-cells = <&precal_art_1000>, <&macaddr_mac_0>;
403 mac-address-increment = <2>;
404 qcom,ath10k-calibration-variant = "zte,mf289f";
405 };
406
407 /* This node is used only on AT2 version for 5Ghz on IPQ4019 with board-id=21 */
408 &wifi1 {
409 status = "okay";
410 nvmem-cell-names = "pre-calibration", "mac-address";
411 nvmem-cells = <&precal_art_5000>, <&macaddr_mac_0>;
412 mac-address-increment = <3>;
413 qcom,ath10k-calibration-variant = "zte,mf289f";
414 };
415
416 /* This node is used only on AT1 version for 5Ghz on QCA9984 */
417 &pcie0 {
418 status = "okay";
419 perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
420 wake-gpio = <&tlmm 40 GPIO_ACTIVE_LOW>;
421 clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>;
422
423 bridge@0,0 {
424 reg = <0x00000000 0 0 0 0>;
425 #address-cells = <3>;
426 #size-cells = <2>;
427 ranges;
428
429 wifi2: wifi@1,0 {
430 nvmem-cell-names = "mac-address";
431 nvmem-cells = <&macaddr_mac_0>;
432 mac-address-increment = <4>;
433 compatible = "qcom,ath10k";
434 reg = <0x00010000 0 0 0 0>;
435 qcom,ath10k-calibration-variant = "zte,mf289f";
436 };
437 };
438 };