1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Rohan Murch <rohan.murch@gmail.com>
4 * Copyright (C) 2016 Hans Ulli Kroll <ulli.kroll@googlemail.com>
5 * Copyright (C) 2017 James McKenzie <openwrt@madingley.org>
8 #include "mt7620a.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/mtd/partitions/uimage.h>
15 compatible = "edimax,br-6478ac-v2", "ralink,mt7620a-soc";
16 model = "Edimax BR-6478AC v2";
19 led-boot = &led_power;
20 led-failsafe = &led_power;
21 led-running = &led_power;
22 led-upgrade = &led_power;
26 compatible = "gpio-keys";
30 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
31 linux,code = <KEY_RESTART>;
36 compatible = "gpio-leds";
39 label = "white:power";
40 gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
44 label = "blue:internet";
45 gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
50 gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
55 gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
56 trigger-sources = <&ohci_port1>, <&ehci_port1>;
57 linux,default-trigger = "usbport";
62 compatible = "gpio-export";
65 gpio-export,name="usb-power";
66 gpio-export,output=<1>;
67 gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>;
80 compatible = "jedec,spi-nor";
82 spi-max-frequency = <10000000>;
85 compatible = "fixed-partitions";
97 reg = <0x30000 0x10000>;
101 factory: partition@40000 {
102 compatible = "nvmem-cells";
104 reg = <0x40000 0x10000>;
105 #address-cells = <1>;
109 eeprom_factory_0: eeprom@0 {
113 eeprom_factory_8000: eeprom@8000 {
114 reg = <0x8000 0x200>;
117 macaddr_factory_4: macaddr@4 {
124 reg = <0x50000 0x20000>;
129 compatible = "openwrt,uimage", "denx,uimage";
130 openwrt,offset = <FW_EDIMAX_OFFSET>;
131 openwrt,partition-magic = <FW_MAGIC_EDIMAX>;
133 reg = <0x00070000 0x00790000>;
141 groups = "i2c", "uartf", "nd_sd";
147 pinctrl-names = "default";
148 pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
150 nvmem-cells = <&macaddr_factory_4>;
151 nvmem-cell-names = "mac-address";
153 mediatek,portmap = "wllll";
157 mediatek,fixed-link = <1000 1 1 1>;
164 phy0: ethernet-phy@0 {
169 phy1: ethernet-phy@1 {
174 phy2: ethernet-phy@2 {
179 phy3: ethernet-phy@3 {
184 phy4: ethernet-phy@4 {
189 phy1f: ethernet-phy@1f {
197 mediatek,ephy-base = /bits/ 8 <12>;
201 nvmem-cells = <&eeprom_factory_0>;
202 nvmem-cell-names = "eeprom";
211 reg = <0x0000 0 0 0 0>;
212 nvmem-cells = <&eeprom_factory_8000>;
213 nvmem-cell-names = "eeprom";
214 ieee80211-freq-limit = <5000000 6000000>;