target/linux/ramips/dts/mt7628an.dtsi

   1 /dts-v1/;
   2
   3 / {
   4         #address-cells = <1>;
   5         #size-cells = <1>;
   6         compatible = "mediatek,mt7628an-soc";
   7
   8         aliases {
   9                 serial0 = &uartlite;
  10         };
  11
  12         cpus {
  13                 #address-cells = <1>;
  14                 #size-cells = <0>;
  15
  16                 cpu@0 {
  17                         compatible = "mips,mips24KEc";
  18                         reg = <0>;
  19                 };
  20         };
  21
  22         chosen {
  23                 bootargs = "console=ttyS0,57600";
  24         };
  25
  26         cpuintc: cpuintc {
  27                 #address-cells = <0>;
  28                 #interrupt-cells = <1>;
  29                 interrupt-controller;
  30                 compatible = "mti,cpu-interrupt-controller";
  31         };
  32
  33         palmbus: palmbus@10000000 {
  34                 compatible = "palmbus";
  35                 reg = <0x10000000 0x200000>;
  36                 ranges = <0x0 0x10000000 0x1FFFFF>;
  37
  38                 #address-cells = <1>;
  39                 #size-cells = <1>;
  40
  41                 sysc: syscon@0 {
  42                         compatible = "ralink,mt7628-sysc", "syscon";
  43                         reg = <0x0 0x100>;
  44                         #clock-cells = <1>;
  45                         #reset-cells = <1>;
  46                 };
  47
  48                 watchdog: watchdog@100 {
  49                         compatible = "mediatek,mt7621-wdt";
  50                         reg = <0x100 0x100>;
  51                         mediatek,sysctl = <&sysc>;
  52                 };
  53
  54                 intc: intc@200 {
  55                         compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
  56                         reg = <0x200 0x100>;
  57
  58                         resets = <&sysc 9>;
  59                         reset-names = "intc";
  60
  61                         interrupt-controller;
  62                         #interrupt-cells = <1>;
  63
  64                         interrupt-parent = <&cpuintc>;
  65                         interrupts = <2>;
  66
  67                         ralink,intc-registers = <0x9c 0xa0
  68                                                  0x6c 0xa4
  69                                                  0x80 0x78>;
  70                 };
  71
  72                 memc: memc@300 {
  73                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  74                         reg = <0x300 0x100>;
  75
  76                         resets = <&sysc 10>;
  77                         reset-names = "mc";
  78
  79                         interrupt-parent = <&intc>;
  80                         interrupts = <3>;
  81                 };
  82
  83                 gpio: gpio@600 {
  84                         compatible = "mediatek,mt7621-gpio";
  85                         reg = <0x600 0x100>;
  86
  87                         interrupt-parent = <&intc>;
  88                         interrupts = <6>;
  89
  90                         #interrupt-cells = <2>;
  91                         interrupt-controller;
  92
  93                         gpio-controller;
  94                         #gpio-cells = <2>;
  95                 };
  96
  97                 i2c: i2c@900 {
  98                         compatible = "mediatek,mt7621-i2c";
  99                         reg = <0x900 0x100>;
 100
 101                         clocks = <&sysc 7>;
 102                         clock-names = "i2c";
 103
 104                         resets = <&sysc 16>;
 105                         reset-names = "i2c";
 106
 107                         #address-cells = <1>;
 108                         #size-cells = <0>;
 109
 110                         status = "disabled";
 111
 112                         pinctrl-names = "default";
 113                         pinctrl-0 = <&i2c_pins>;
 114                 };
 115
 116                 i2s: i2s@a00 {
 117                         compatible = "mediatek,mt7628-i2s";
 118                         reg = <0xa00 0x100>;
 119
 120                         clocks = <&sysc 8>;
 121
 122                         resets = <&sysc 17>;
 123                         reset-names = "i2s";
 124
 125                         interrupt-parent = <&intc>;
 126                         interrupts = <10>;
 127
 128                         txdma-req = <2>;
 129                         rxdma-req = <3>;
 130
 131                         dmas = <&gdma 4>,
 132                                 <&gdma 6>;
 133                         dma-names = "tx", "rx";
 134
 135                         status = "disabled";
 136                 };
 137
 138                 spi0: spi@b00 {
 139                         compatible = "ralink,mt7621-spi";
 140                         reg = <0xb00 0x100>;
 141
 142                         clocks = <&sysc 9>;
 143                         clock-names = "spi";
 144
 145                         resets = <&sysc 18>;
 146                         reset-names = "spi";
 147
 148                         #address-cells = <1>;
 149                         #size-cells = <0>;
 150
 151                         pinctrl-names = "default";
 152                         pinctrl-0 = <&spi_pins>;
 153
 154                         status = "disabled";
 155                 };
 156
 157                 uartlite: uart0@c00 {
 158                         compatible = "ns16550a";
 159                         reg = <0xc00 0x100>;
 160
 161                         reg-shift = <2>;
 162                         reg-io-width = <4>;
 163                         no-loopback-test;
 164
 165                         clocks = <&sysc 11>;
 166
 167                         resets = <&sysc 12>;
 168
 169                         interrupt-parent = <&intc>;
 170                         interrupts = <20>;
 171
 172                         pinctrl-names = "default";
 173                         pinctrl-0 = <&uart0_pins>;
 174                 };
 175
 176                 uart1: uart1@d00 {
 177                         compatible = "ns16550a";
 178                         reg = <0xd00 0x100>;
 179
 180                         reg-shift = <2>;
 181                         reg-io-width = <4>;
 182                         no-loopback-test;
 183
 184                         clocks = <&sysc 12>;
 185
 186                         resets = <&sysc 19>;
 187
 188                         interrupt-parent = <&intc>;
 189                         interrupts = <21>;
 190
 191                         pinctrl-names = "default";
 192                         pinctrl-0 = <&uart1_pins>;
 193
 194                         status = "disabled";
 195                 };
 196
 197                 uart2: uart2@e00 {
 198                         compatible = "ns16550a";
 199                         reg = <0xe00 0x100>;
 200
 201                         reg-shift = <2>;
 202                         reg-io-width = <4>;
 203                         no-loopback-test;
 204
 205                         clocks = <&sysc 13>;
 206
 207                         resets = <&sysc 20>;
 208
 209                         interrupt-parent = <&intc>;
 210                         interrupts = <22>;
 211
 212                         pinctrl-names = "default";
 213                         pinctrl-0 = <&uart2_pins>;
 214
 215                         status = "disabled";
 216                 };
 217
 218                 pwm: pwm@5000 {
 219                         compatible = "mediatek,mt7628-pwm";
 220                         reg = <0x5000 0x1000>;
 221                         #pwm-cells = <2>;
 222
 223                         resets = <&sysc 31>;
 224                         reset-names = "pwm";
 225
 226                         pinctrl-names = "default";
 227                         pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
 228
 229                         status = "disabled";
 230                 };
 231
 232                 pcm: pcm@2000 {
 233                         compatible = "ralink,mt7620a-pcm";
 234                         reg = <0x2000 0x800>;
 235
 236                         resets = <&sysc 11>;
 237                         reset-names = "pcm";
 238
 239                         interrupt-parent = <&intc>;
 240                         interrupts = <4>;
 241
 242                         status = "disabled";
 243                 };
 244
 245                 gdma: gdma@2800 {
 246                         compatible = "ralink,rt3883-gdma";
 247                         reg = <0x2800 0x800>;
 248
 249                         resets = <&sysc 14>;
 250                         reset-names = "dma";
 251
 252                         interrupt-parent = <&intc>;
 253                         interrupts = <7>;
 254
 255                         #dma-cells = <1>;
 256                         #dma-channels = <16>;
 257                         #dma-requests = <16>;
 258
 259                         status = "disabled";
 260                 };
 261         };
 262
 263         pinctrl: pinctrl {
 264                 compatible = "ralink,rt2880-pinmux";
 265                 pinctrl-names = "default";
 266                 pinctrl-0 = <&state_default>;
 267
 268                 state_default: pinctrl0 {
 269                 };
 270
 271                 spi_pins: spi_pins {
 272                         spi_pins {
 273                                 groups = "spi";
 274                                 function = "spi";
 275                         };
 276                 };
 277
 278                 spi_cs1_pins: spi_cs1 {
 279                         spi_cs1 {
 280                                 groups = "spi cs1";
 281                                 function = "spi cs1";
 282                         };
 283                 };
 284
 285                 i2c_pins: i2c_pins {
 286                         i2c_pins {
 287                                 groups = "i2c";
 288                                 function = "i2c";
 289                         };
 290                 };
 291
 292                 i2s_pins: i2s {
 293                         i2s {
 294                                 groups = "i2s";
 295                                 function = "i2s";
 296                         };
 297                 };
 298
 299                 uart0_pins: uartlite {
 300                         uartlite {
 301                                 groups = "uart0";
 302                                 function = "uart0";
 303                         };
 304                 };
 305
 306                 uart1_pins: uart1 {
 307                         uart1 {
 308                                 groups = "uart1";
 309                                 function = "uart1";
 310                         };
 311                 };
 312
 313                 uart2_pins: uart2 {
 314                         uart2 {
 315                                 groups = "uart2";
 316                                 function = "uart2";
 317                         };
 318                 };
 319
 320                 sdxc_pins: sdxc {
 321                         sdxc {
 322                                 groups = "sdmode";
 323                                 function = "sdxc";
 324                         };
 325                 };
 326
 327                 pwm0_pins: pwm0 {
 328                         pwm0 {
 329                                 groups = "pwm0";
 330                                 function = "pwm0";
 331                         };
 332                 };
 333
 334                 pwm1_pins: pwm1 {
 335                         pwm1 {
 336                                 groups = "pwm1";
 337                                 function = "pwm1";
 338                         };
 339                 };
 340
 341                 pcm_i2s_pins: pcm_i2s {
 342                         pcm_i2s {
 343                                 groups = "i2s";
 344                                 function = "pcm";
 345                         };
 346                 };
 347
 348                 refclk_pins: refclk {
 349                         refclk {
 350                                 groups = "refclk";
 351                                 function = "refclk";
 352                         };
 353                 };
 354         };
 355
 356         usbphy: usbphy@10120000 {
 357                 compatible = "mediatek,mt7628-usbphy", "mediatek,mt7620-usbphy";
 358                 reg = <0x10120000 0x1000>;
 359                 #phy-cells = <0>;
 360
 361                 ralink,sysctl = <&sysc>;
 362                 /* usb phy reset is only controled by RSTCTRL bit 22 */
 363                 resets = <&sysc 22>, <&sysc 25>;
 364                 reset-names = "host", "device";
 365         };
 366
 367         sdhci: sdhci@10130000 {
 368                 compatible = "ralink,mt7620-sdhci";
 369                 reg = <0x10130000 0x4000>;
 370
 371                 interrupt-parent = <&intc>;
 372                 interrupts = <14>;
 373
 374                 pinctrl-names = "default";
 375                 pinctrl-0 = <&sdxc_pins>;
 376
 377                 status = "disabled";
 378         };
 379
 380         ehci: ehci@101c0000 {
 381                 #address-cells = <1>;
 382                 #size-cells = <0>;
 383                 compatible = "generic-ehci";
 384                 reg = <0x101c0000 0x1000>;
 385
 386                 phys = <&usbphy>;
 387                 phy-names = "usb";
 388
 389                 interrupt-parent = <&intc>;
 390                 interrupts = <18>;
 391
 392                 ehci_port1: port@1 {
 393                         reg = <1>;
 394                         #trigger-source-cells = <0>;
 395                 };
 396         };
 397
 398         ohci: ohci@101c1000 {
 399                 #address-cells = <1>;
 400                 #size-cells = <0>;
 401                 compatible = "generic-ohci";
 402                 reg = <0x101c1000 0x1000>;
 403
 404                 phys = <&usbphy>;
 405                 phy-names = "usb";
 406
 407                 interrupt-parent = <&intc>;
 408                 interrupts = <18>;
 409
 410                 ohci_port1: port@1 {
 411                         reg = <1>;
 412                         #trigger-source-cells = <0>;
 413                 };
 414         };
 415
 416         ethernet: ethernet@10100000 {
 417                 compatible = "ralink,rt5350-eth";
 418                 reg = <0x10100000 0x10000>;
 419
 420                 interrupt-parent = <&cpuintc>;
 421                 interrupts = <5>;
 422
 423                 resets = <&sysc 21>;
 424                 reset-names = "fe";
 425
 426                 mediatek,switch = <&esw>;
 427         };
 428
 429         esw: esw@10110000 {
 430                 compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw";
 431                 reg = <0x10110000 0x8000>;
 432
 433                 resets = <&sysc 23>, <&sysc 24>;
 434                 reset-names = "esw", "ephy";
 435
 436                 interrupt-parent = <&intc>;
 437                 interrupts = <17>;
 438         };
 439
 440         pcie: pcie@10140000 {
 441                 compatible = "mediatek,mt7620-pci";
 442                 reg = <0x10140000 0x100
 443                         0x10142000 0x100>;
 444
 445                 #address-cells = <3>;
 446                 #size-cells = <2>;
 447
 448                 interrupt-parent = <&cpuintc>;
 449                 interrupts = <4>;
 450
 451                 resets = <&sysc 26>;
 452                 reset-names = "pcie0";
 453
 454                 status = "disabled";
 455
 456                 device_type = "pci";
 457
 458                 bus-range = <0 255>;
 459                 ranges = <
 460                         0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 461                         0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 462                 >;
 463
 464                 pcie0: pcie@0,0 {
 465                         reg = <0x0000 0 0 0 0>;
 466
 467                         #address-cells = <3>;
 468                         #size-cells = <2>;
 469
 470                         device_type = "pci";
 471
 472                         ranges;
 473                 };
 474         };
 475
 476         wmac: wmac@10300000 {
 477                 compatible = "mediatek,mt7628-wmac";
 478                 reg = <0x10300000 0x100000>;
 479
 480                 clocks = <&sysc 14>;
 481
 482                 interrupt-parent = <&cpuintc>;
 483                 interrupts = <6>;
 484
 485                 status = "disabled";
 486         };
 487 };