target/linux/ramips/dts/mt7628an.dtsi

   1 /dts-v1/;
   2
   3 / {
   4         #address-cells = <1>;
   5         #size-cells = <1>;
   6         compatible = "mediatek,mt7628an-soc";
   7
   8         aliases {
   9                 serial0 = &uartlite;
  10         };
  11
  12         cpus {
  13                 #address-cells = <1>;
  14                 #size-cells = <0>;
  15
  16                 cpu@0 {
  17                         compatible = "mips,mips24KEc";
  18                         reg = <0>;
  19                 };
  20         };
  21
  22         chosen {
  23                 bootargs = "console=ttyS0,57600";
  24         };
  25
  26         cpuintc: cpuintc {
  27                 #address-cells = <0>;
  28                 #interrupt-cells = <1>;
  29                 interrupt-controller;
  30                 compatible = "mti,cpu-interrupt-controller";
  31         };
  32
  33         palmbus: palmbus@10000000 {
  34                 compatible = "palmbus";
  35                 reg = <0x10000000 0x200000>;
  36                 ranges = <0x0 0x10000000 0x1FFFFF>;
  37
  38                 #address-cells = <1>;
  39                 #size-cells = <1>;
  40
  41                 sysc: syscon@0 {
  42                         compatible = "ralink,mt7628-sysc", "syscon";
  43                         reg = <0x0 0x100>;
  44                         #clock-cells = <1>;
  45                         #reset-cells = <1>;
  46                 };
  47
  48                 watchdog: watchdog@100 {
  49                         compatible = "ralink,mt7628an-wdt", "mediatek,mt7621-wdt";
  50                         reg = <0x100 0x30>;
  51
  52                         clocks = <&sysc 6>;
  53
  54                         resets = <&sysc 8>;
  55                         reset-names = "wdt";
  56
  57                         interrupt-parent = <&intc>;
  58                         interrupts = <24>;
  59                 };
  60
  61                 intc: intc@200 {
  62                         compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
  63                         reg = <0x200 0x100>;
  64
  65                         resets = <&sysc 9>;
  66                         reset-names = "intc";
  67
  68                         interrupt-controller;
  69                         #interrupt-cells = <1>;
  70
  71                         interrupt-parent = <&cpuintc>;
  72                         interrupts = <2>;
  73
  74                         ralink,intc-registers = <0x9c 0xa0
  75                                                  0x6c 0xa4
  76                                                  0x80 0x78>;
  77                 };
  78
  79                 memc: memc@300 {
  80                         compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
  81                         reg = <0x300 0x100>;
  82
  83                         resets = <&sysc 10>;
  84                         reset-names = "mc";
  85
  86                         interrupt-parent = <&intc>;
  87                         interrupts = <3>;
  88                 };
  89
  90                 gpio: gpio@600 {
  91                         compatible = "mediatek,mt7621-gpio";
  92                         reg = <0x600 0x100>;
  93
  94                         interrupt-parent = <&intc>;
  95                         interrupts = <6>;
  96
  97                         #interrupt-cells = <2>;
  98                         interrupt-controller;
  99
 100                         gpio-controller;
 101                         #gpio-cells = <2>;
 102                 };
 103
 104                 i2c: i2c@900 {
 105                         compatible = "mediatek,mt7621-i2c";
 106                         reg = <0x900 0x100>;
 107
 108                         clocks = <&sysc 7>;
 109                         clock-names = "i2c";
 110
 111                         resets = <&sysc 16>;
 112                         reset-names = "i2c";
 113
 114                         #address-cells = <1>;
 115                         #size-cells = <0>;
 116
 117                         status = "disabled";
 118
 119                         pinctrl-names = "default";
 120                         pinctrl-0 = <&i2c_pins>;
 121                 };
 122
 123                 i2s: i2s@a00 {
 124                         compatible = "mediatek,mt7628-i2s";
 125                         reg = <0xa00 0x100>;
 126
 127                         clocks = <&sysc 8>;
 128
 129                         resets = <&sysc 17>;
 130                         reset-names = "i2s";
 131
 132                         interrupt-parent = <&intc>;
 133                         interrupts = <10>;
 134
 135                         txdma-req = <2>;
 136                         rxdma-req = <3>;
 137
 138                         dmas = <&gdma 4>,
 139                                 <&gdma 6>;
 140                         dma-names = "tx", "rx";
 141
 142                         status = "disabled";
 143                 };
 144
 145                 spi0: spi@b00 {
 146                         compatible = "ralink,mt7621-spi";
 147                         reg = <0xb00 0x100>;
 148
 149                         clocks = <&sysc 9>;
 150                         clock-names = "spi";
 151
 152                         resets = <&sysc 18>;
 153                         reset-names = "spi";
 154
 155                         #address-cells = <1>;
 156                         #size-cells = <0>;
 157
 158                         pinctrl-names = "default";
 159                         pinctrl-0 = <&spi_pins>;
 160
 161                         status = "disabled";
 162                 };
 163
 164                 uartlite: uart0@c00 {
 165                         compatible = "ns16550a";
 166                         reg = <0xc00 0x100>;
 167
 168                         reg-shift = <2>;
 169                         reg-io-width = <4>;
 170                         no-loopback-test;
 171
 172                         clocks = <&sysc 11>;
 173
 174                         resets = <&sysc 12>;
 175
 176                         interrupt-parent = <&intc>;
 177                         interrupts = <20>;
 178
 179                         pinctrl-names = "default";
 180                         pinctrl-0 = <&uart0_pins>;
 181                 };
 182
 183                 uart1: uart1@d00 {
 184                         compatible = "ns16550a";
 185                         reg = <0xd00 0x100>;
 186
 187                         reg-shift = <2>;
 188                         reg-io-width = <4>;
 189                         no-loopback-test;
 190
 191                         clocks = <&sysc 12>;
 192
 193                         resets = <&sysc 19>;
 194
 195                         interrupt-parent = <&intc>;
 196                         interrupts = <21>;
 197
 198                         pinctrl-names = "default";
 199                         pinctrl-0 = <&uart1_pins>;
 200
 201                         status = "disabled";
 202                 };
 203
 204                 uart2: uart2@e00 {
 205                         compatible = "ns16550a";
 206                         reg = <0xe00 0x100>;
 207
 208                         reg-shift = <2>;
 209                         reg-io-width = <4>;
 210                         no-loopback-test;
 211
 212                         clocks = <&sysc 13>;
 213
 214                         resets = <&sysc 20>;
 215
 216                         interrupt-parent = <&intc>;
 217                         interrupts = <22>;
 218
 219                         pinctrl-names = "default";
 220                         pinctrl-0 = <&uart2_pins>;
 221
 222                         status = "disabled";
 223                 };
 224
 225                 pwm: pwm@5000 {
 226                         compatible = "mediatek,mt7628-pwm";
 227                         reg = <0x5000 0x1000>;
 228                         #pwm-cells = <2>;
 229
 230                         resets = <&sysc 31>;
 231                         reset-names = "pwm";
 232
 233                         pinctrl-names = "default";
 234                         pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
 235
 236                         status = "disabled";
 237                 };
 238
 239                 pcm: pcm@2000 {
 240                         compatible = "ralink,mt7620a-pcm";
 241                         reg = <0x2000 0x800>;
 242
 243                         resets = <&sysc 11>;
 244                         reset-names = "pcm";
 245
 246                         interrupt-parent = <&intc>;
 247                         interrupts = <4>;
 248
 249                         status = "disabled";
 250                 };
 251
 252                 gdma: gdma@2800 {
 253                         compatible = "ralink,rt3883-gdma";
 254                         reg = <0x2800 0x800>;
 255
 256                         resets = <&sysc 14>;
 257                         reset-names = "dma";
 258
 259                         interrupt-parent = <&intc>;
 260                         interrupts = <7>;
 261
 262                         #dma-cells = <1>;
 263                         #dma-channels = <16>;
 264                         #dma-requests = <16>;
 265
 266                         status = "disabled";
 267                 };
 268         };
 269
 270         pinctrl: pinctrl {
 271                 compatible = "ralink,rt2880-pinmux";
 272                 pinctrl-names = "default";
 273                 pinctrl-0 = <&state_default>;
 274
 275                 state_default: pinctrl0 {
 276                 };
 277
 278                 spi_pins: spi_pins {
 279                         spi_pins {
 280                                 groups = "spi";
 281                                 function = "spi";
 282                         };
 283                 };
 284
 285                 spi_cs1_pins: spi_cs1 {
 286                         spi_cs1 {
 287                                 groups = "spi cs1";
 288                                 function = "spi cs1";
 289                         };
 290                 };
 291
 292                 i2c_pins: i2c_pins {
 293                         i2c_pins {
 294                                 groups = "i2c";
 295                                 function = "i2c";
 296                         };
 297                 };
 298
 299                 i2s_pins: i2s {
 300                         i2s {
 301                                 groups = "i2s";
 302                                 function = "i2s";
 303                         };
 304                 };
 305
 306                 uart0_pins: uartlite {
 307                         uartlite {
 308                                 groups = "uart0";
 309                                 function = "uart0";
 310                         };
 311                 };
 312
 313                 uart1_pins: uart1 {
 314                         uart1 {
 315                                 groups = "uart1";
 316                                 function = "uart1";
 317                         };
 318                 };
 319
 320                 uart2_pins: uart2 {
 321                         uart2 {
 322                                 groups = "uart2";
 323                                 function = "uart2";
 324                         };
 325                 };
 326
 327                 sdxc_pins: sdxc {
 328                         sdxc {
 329                                 groups = "sdmode";
 330                                 function = "sdxc";
 331                         };
 332                 };
 333
 334                 pwm0_pins: pwm0 {
 335                         pwm0 {
 336                                 groups = "pwm0";
 337                                 function = "pwm0";
 338                         };
 339                 };
 340
 341                 pwm1_pins: pwm1 {
 342                         pwm1 {
 343                                 groups = "pwm1";
 344                                 function = "pwm1";
 345                         };
 346                 };
 347
 348                 pcm_i2s_pins: pcm_i2s {
 349                         pcm_i2s {
 350                                 groups = "i2s";
 351                                 function = "pcm";
 352                         };
 353                 };
 354
 355                 refclk_pins: refclk {
 356                         refclk {
 357                                 groups = "refclk";
 358                                 function = "refclk";
 359                         };
 360                 };
 361         };
 362
 363         usbphy: usbphy@10120000 {
 364                 compatible = "mediatek,mt7628-usbphy", "mediatek,mt7620-usbphy";
 365                 reg = <0x10120000 0x1000>;
 366                 #phy-cells = <0>;
 367
 368                 ralink,sysctl = <&sysc>;
 369                 /* usb phy reset is only controled by RSTCTRL bit 22 */
 370                 resets = <&sysc 22>, <&sysc 25>;
 371                 reset-names = "host", "device";
 372         };
 373
 374         sdhci: sdhci@10130000 {
 375                 compatible = "ralink,mt7620-sdhci";
 376                 reg = <0x10130000 0x4000>;
 377
 378                 interrupt-parent = <&intc>;
 379                 interrupts = <14>;
 380
 381                 pinctrl-names = "default";
 382                 pinctrl-0 = <&sdxc_pins>;
 383
 384                 status = "disabled";
 385         };
 386
 387         ehci: ehci@101c0000 {
 388                 #address-cells = <1>;
 389                 #size-cells = <0>;
 390                 compatible = "generic-ehci";
 391                 reg = <0x101c0000 0x1000>;
 392
 393                 phys = <&usbphy>;
 394                 phy-names = "usb";
 395
 396                 interrupt-parent = <&intc>;
 397                 interrupts = <18>;
 398
 399                 ehci_port1: port@1 {
 400                         reg = <1>;
 401                         #trigger-source-cells = <0>;
 402                 };
 403         };
 404
 405         ohci: ohci@101c1000 {
 406                 #address-cells = <1>;
 407                 #size-cells = <0>;
 408                 compatible = "generic-ohci";
 409                 reg = <0x101c1000 0x1000>;
 410
 411                 phys = <&usbphy>;
 412                 phy-names = "usb";
 413
 414                 interrupt-parent = <&intc>;
 415                 interrupts = <18>;
 416
 417                 ohci_port1: port@1 {
 418                         reg = <1>;
 419                         #trigger-source-cells = <0>;
 420                 };
 421         };
 422
 423         ethernet: ethernet@10100000 {
 424                 compatible = "ralink,rt5350-eth";
 425                 reg = <0x10100000 0x10000>;
 426
 427                 interrupt-parent = <&cpuintc>;
 428                 interrupts = <5>;
 429
 430                 resets = <&sysc 21>;
 431                 reset-names = "fe";
 432
 433                 mediatek,switch = <&esw>;
 434         };
 435
 436         esw: esw@10110000 {
 437                 compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw";
 438                 reg = <0x10110000 0x8000>;
 439
 440                 resets = <&sysc 23>, <&sysc 24>;
 441                 reset-names = "esw", "ephy";
 442
 443                 interrupt-parent = <&intc>;
 444                 interrupts = <17>;
 445         };
 446
 447         pcie: pcie@10140000 {
 448                 compatible = "mediatek,mt7620-pci";
 449                 reg = <0x10140000 0x100
 450                         0x10142000 0x100>;
 451
 452                 #address-cells = <3>;
 453                 #size-cells = <2>;
 454
 455                 interrupt-parent = <&cpuintc>;
 456                 interrupts = <4>;
 457
 458                 resets = <&sysc 26>;
 459                 reset-names = "pcie0";
 460
 461                 status = "disabled";
 462
 463                 device_type = "pci";
 464
 465                 bus-range = <0 255>;
 466                 ranges = <
 467                         0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
 468                         0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
 469                 >;
 470
 471                 pcie0: pcie@0,0 {
 472                         reg = <0x0000 0 0 0 0>;
 473
 474                         #address-cells = <3>;
 475                         #size-cells = <2>;
 476
 477                         device_type = "pci";
 478
 479                         ranges;
 480                 };
 481         };
 482
 483         wmac: wmac@10300000 {
 484                 compatible = "mediatek,mt7628-wmac";
 485                 reg = <0x10300000 0x100000>;
 486
 487                 clocks = <&sysc 14>;
 488
 489                 interrupt-parent = <&cpuintc>;
 490                 interrupts = <6>;
 491
 492                 status = "disabled";
 493         };
 494 };