6 compatible = "ralink,rt3352-soc";
19 compatible = "mips,mips24KEc";
25 bootargs = "console=ttyS0,57600";
30 #interrupt-cells = <1>;
32 compatible = "mti,cpu-interrupt-controller";
35 palmbus: palmbus@10000000 {
36 compatible = "palmbus";
37 reg = <0x10000000 0x200000>;
38 ranges = <0x0 0x10000000 0x1FFFFF>;
44 compatible = "ralink,rt3352-sysc", "ralink,rt3050-sysc", "syscon";
49 compatible = "ralink,rt3352-timer", "ralink,rt2880-timer";
52 interrupt-parent = <&intc>;
56 watchdog: watchdog@120 {
57 compatible = "ralink,rt3352-wdt", "ralink,rt2880-wdt";
60 resets = <&rstctrl 8>;
63 interrupt-parent = <&intc>;
68 compatible = "ralink,rt3352-intc", "ralink,rt2880-intc";
72 #interrupt-cells = <1>;
74 interrupt-parent = <&cpuintc>;
79 compatible = "ralink,rt3352-memc", "ralink,rt3050-memc";
82 resets = <&rstctrl 20>;
85 interrupt-parent = <&intc>;
90 compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
93 resets = <&rstctrl 12>;
96 interrupt-parent = <&intc>;
105 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
112 ralink,gpio-base = <0>;
113 ralink,register-map = [ 00 04 08 0c
116 resets = <&rstctrl 13>;
119 interrupt-parent = <&intc>;
124 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
131 ralink,gpio-base = <24>;
132 ralink,register-map = [ 00 04 08 0c
140 compatible = "ralink,rt3352-gpio", "ralink,rt2880-gpio";
147 ralink,gpio-base = <40>;
148 ralink,register-map = [ 00 04 08 0c
156 compatible = "ralink,rt2880-i2c";
159 resets = <&rstctrl 16>;
162 #address-cells = <1>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&i2c_pins>;
172 compatible = "ralink,rt3352-i2s";
175 resets = <&rstctrl 17>;
178 interrupt-parent = <&intc>;
186 dma-names = "tx", "rx";
192 compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
194 #address-cells = <1>;
197 resets = <&rstctrl 18>;
200 pinctrl-names = "default";
201 pinctrl-0 = <&spi_pins>;
207 compatible = "ralink,rt3352-spi", "ralink,rt2880-spi";
209 #address-cells = <1>;
212 resets = <&rstctrl 18>;
215 pinctrl-names = "default";
216 pinctrl-0 = <&spi_cs1>;
221 uartlite: uartlite@c00 {
222 compatible = "ralink,rt3352-uart", "ralink,rt2880-uart", "ns16550a";
225 resets = <&rstctrl 19>;
226 reset-names = "uartl";
228 interrupt-parent = <&intc>;
233 pinctrl-names = "default";
234 pinctrl-0 = <&uartlite_pins>;
238 compatible = "ralink,rt3883-gdma";
239 reg = <0x2800 0x800>;
241 resets = <&rstctrl 14>;
244 interrupt-parent = <&intc>;
248 #dma-channels = <16>;
249 #dma-requests = <16>;
256 compatible = "ralink,rt2880-pinmux";
258 pinctrl-names = "default";
259 pinctrl-0 = <&state_default>;
261 state_default: pinctrl0 {
295 function = "spi_cs1";
299 uartlite_pins: uartlite {
302 function = "uartlite";
308 compatible = "ralink,rt3352-reset", "ralink,rt2880-reset";
313 compatible = "ralink,rt2880-clock";
317 ethernet: ethernet@10100000 {
318 compatible = "ralink,rt3352-eth", "ralink,rt3050-eth";
319 reg = <0x10100000 0x10000>;
321 resets = <&rstctrl 21>;
324 interrupt-parent = <&cpuintc>;
327 mediatek,switch = <&esw>;
331 compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
332 reg = <0x10110000 0x8000>;
334 resets = <&rstctrl 23 &rstctrl 24>;
335 reset-names = "esw", "ephy";
337 interrupt-parent = <&intc>;
342 compatible = "ralink,rt3352-usbphy";
345 ralink,sysctl = <&sysc>;
346 resets = <&rstctrl 22 &rstctrl 25>;
347 reset-names = "host", "device";
348 clocks = <&clkctrl 18 &clkctrl 20>;
349 clock-names = "host", "device";
352 wmac: wmac@10180000 {
353 compatible = "ralink,rt3352-wmac", "ralink,rt2880-wmac";
354 reg = <0x10180000 0x40000>;
356 interrupt-parent = <&cpuintc>;
359 ralink,eeprom = "soc_wmac.eeprom";
362 ehci: ehci@101c0000 {
363 #address-cells = <1>;
365 compatible = "generic-ehci";
366 reg = <0x101c0000 0x1000>;
371 interrupt-parent = <&intc>;
378 #trigger-source-cells = <0>;
382 ohci: ohci@101c1000 {
383 #address-cells = <1>;
385 compatible = "generic-ohci";
386 reg = <0x101c1000 0x1000>;
391 interrupt-parent = <&intc>;
398 #trigger-source-cells = <0>;