327763878405b91ce81fb2b18dc19115db9fd96d
[openwrt/openwrt.git] / package / boot / uboot-mvebu / patches / 013-mmc-xenon_sdhci-remove-wait_dat0-SDHCI-OP.patch
1 From 0f3466f52fbacce67e147b9234e6323edff26a6d Mon Sep 17 00:00:00 2001
2 From: Robert Marko <robert.marko@sartura.hr>
3 Date: Fri, 11 Mar 2022 19:14:07 +0100
4 Subject: [PATCH] mmc: xenon_sdhci: remove wait_dat0 SDHCI OP
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Generic SDHCI driver received support for checking the busy status by
10 polling the DAT[0] level instead of waiting for the worst MMC switch time.
11
12 Unfortunately, it appears that this does not work for Xenon controllers
13 despite being a part of the standard SDHCI registers and the Armada 3720
14 datasheet itself telling that BIT(20) is useful for detecting the DAT[0]
15 busy signal.
16
17 I have tried increasing the timeout value, but I have newer managed to
18 catch DAT_LEVEL bits change from 0 at all.
19
20 This issue appears to hit most if not all SoC-s supported by Xenon driver,
21 at least A3720, A8040 and CN9130 have non working eMMC currently.
22
23 So, until a better solution is found drop the wait_dat0 OP for Xenon.
24 I was able to only test it on A3720, but it should work for others as well.
25
26 Fixes: 40e6f52454fc ("drivers: mmc: Add wait_dat0 support for sdhci driver")
27 Signed-off-by: Robert Marko <robert.marko@sartura.hr>
28 Reviewed-by: Marek BehĂșn <marek.behun@nic.cz>
29 Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
30 Reviewed-by: Stefan Roese <sr@denx.de>
31 ---
32 drivers/mmc/xenon_sdhci.c | 7 ++++++-
33 1 file changed, 6 insertions(+), 1 deletion(-)
34
35 --- a/drivers/mmc/xenon_sdhci.c
36 +++ b/drivers/mmc/xenon_sdhci.c
37 @@ -439,6 +439,8 @@ static const struct sdhci_ops xenon_sdhc
38 .set_ios_post = xenon_sdhci_set_ios_post
39 };
40
41 +static struct dm_mmc_ops xenon_mmc_ops;
42 +
43 static int xenon_sdhci_probe(struct udevice *dev)
44 {
45 struct xenon_sdhci_plat *plat = dev_get_plat(dev);
46 @@ -452,6 +454,9 @@ static int xenon_sdhci_probe(struct udev
47 host->mmc->dev = dev;
48 upriv->mmc = host->mmc;
49
50 + xenon_mmc_ops = sdhci_ops;
51 + xenon_mmc_ops.wait_dat0 = NULL;
52 +
53 /* Set quirks */
54 host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_32BIT_DMA_ADDR;
55
56 @@ -568,7 +573,7 @@ U_BOOT_DRIVER(xenon_sdhci_drv) = {
57 .id = UCLASS_MMC,
58 .of_match = xenon_sdhci_ids,
59 .of_to_plat = xenon_sdhci_of_to_plat,
60 - .ops = &sdhci_ops,
61 + .ops = &xenon_mmc_ops,
62 .bind = xenon_sdhci_bind,
63 .probe = xenon_sdhci_probe,
64 .remove = xenon_sdhci_remove,