package/boot/uboot-mvebu/patches/100-ddr-marvell-a38x-fix-BYTE_HOMOGENEOUS_SPLIT_OUT-deci.patch

   1 From c11428c7def52671f57089701efe878f7071b696 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <marek.behun@nic.cz>
   3 Date: Thu, 17 Feb 2022 01:08:37 +0100
   4 Subject: [PATCH 1/3] ddr: marvell: a38x: fix BYTE_HOMOGENEOUS_SPLIT_OUT
   5  decision
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 In commit 3fc92a215b69 ("ddr: marvell: a38x: fix SPLIT_OUT_MIX state
  11 decision") I ported a cleaned up and changed version of patch
  12   mv_ddr: a380: fix SPLIT_OUT_MIX state decision
  13
  14 In the port we removed checking for BYTE_HOMOGENEOUS_SPLIT_OUT bit,
  15 because:
  16 - the fix seemed to work without it
  17 - the bit was checked for only at one place out of two, while the second
  18   bit, BYTE_SPLIT_OUT_MIX, was checked for in both cases
  19 - without the removal it didn't work on Allied Telesis' x530 board
  20
  21 We recently had a chance to test on more boards, and it seems that the
  22 change needs to be opposite: instead of removing the check for
  23 BYTE_HOMOGENEOUS_SPLIT_OUT from the first if() statement, the check
  24 needs to be added also to the second one - it needs to be at both
  25 places.
  26
  27 With this change all the Turris Omnia boards I have had available to
  28 test seem to work, I didn't encounter not even one failed DDR training.
  29
  30 As last time, I am noting that I do not understand what this code is
  31 actually doing, I haven't studied the DDR training algorithm and
  32 I suspect that no one will be able to explain it to U-Boot contributors,
  33 so we are left with this blind poking in the code with testing whether
  34 it works on several boards and hoping it doesn't break anything for
  35 anyone :-(.
  36
  37 Signed-off-by: Marek Behún <marek.behun@nic.cz>
  38 Tested-by: Chris Packham <judge.packham@gmail.com>
  39 Reviewed-by: Stefan Roese <sr@denx.de>
  40 ---
  41  drivers/ddr/marvell/a38x/ddr3_training_centralization.c | 6 ++++--
  42  1 file changed, 4 insertions(+), 2 deletions(-)
  43
  44 --- a/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
  45 +++ b/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
  46 @@ -180,7 +180,8 @@ static int ddr3_tip_centralization(u32 d
  47                                                                [bit_id],
  48                                                                EDGE_1);
  49                                         if (current_byte_status &
  50 -                                           BYTE_SPLIT_OUT_MIX) {
  51 +                                           (BYTE_SPLIT_OUT_MIX |
  52 +                                            BYTE_HOMOGENEOUS_SPLIT_OUT)) {
  53                                                 if (cur_start_win[bit_id] >= 64)
  54                                                         cur_start_win[bit_id] -= 64;
  55                                                 else
  56 @@ -197,7 +198,8 @@ static int ddr3_tip_centralization(u32 d
  57                                                                EDGE_1);
  58                                         if (cur_end_win[bit_id] >= 64 &&
  59                                             (current_byte_status &
  60 -                                            BYTE_SPLIT_OUT_MIX)) {
  61 +                                            (BYTE_SPLIT_OUT_MIX |
  62 +                                             BYTE_HOMOGENEOUS_SPLIT_OUT))) {
  63                                                 cur_end_win[bit_id] -= 64;
  64                                                 DEBUG_CENTRALIZATION_ENGINE
  65                                                         (DEBUG_LEVEL_INFO,