package/boot/uboot-mvebu/patches/101-arm-mvebu-spl-Add-option-to-reset-the-board-on-DDR-t.patch

   1 From 74767a3875c99b1a3d2818456a5fdc02ec1e4f93 Mon Sep 17 00:00:00 2001
   2 From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <marek.behun@nic.cz>
   3 Date: Thu, 17 Feb 2022 13:54:42 +0100
   4 Subject: [PATCH 2/3] arm: mvebu: spl: Add option to reset the board on DDR
   5  training failure
   6 MIME-Version: 1.0
   7 Content-Type: text/plain; charset=UTF-8
   8 Content-Transfer-Encoding: 8bit
   9
  10 Some boards may occacionally fail DDR training. Currently we hang() in
  11 this case. Add an option that makes the board do an immediate reset in
  12 such a case, so that a new training is tried as soon as possible,
  13 instead of hanging and possibly waiting for watchdog to reset the board.
  14
  15 (If the DDR training fails while booting the image via UART, we will
  16  still hang - it doesn't make sense to reset in such a case, because
  17  after reset the board will try booting from another medium, and the
  18  UART booting utility does not expect that.)
  19
  20 Signed-off-by: Marek Behún <marek.behun@nic.cz>
  21 Reviewed-by: Pali Rohár <pali@kernel.org>
  22 Reviewed-by: Stefan Roese <sr@denx.de>
  23 ---
  24  arch/arm/mach-mvebu/spl.c | 7 ++++++-
  25  1 file changed, 6 insertions(+), 1 deletion(-)
  26
  27 --- a/arch/arm/mach-mvebu/spl.c
  28 +++ b/arch/arm/mach-mvebu/spl.c
  29 @@ -4,6 +4,7 @@
  30   */
  31
  32  #include <common.h>
  33 +#include <cpu_func.h>
  34  #include <dm.h>
  35  #include <debug_uart.h>
  36  #include <fdtdec.h>
  37 @@ -290,7 +291,11 @@ void board_init_f(ulong dummy)
  38         ret = ddr3_init();
  39         if (ret) {
  40                 debug("ddr3_init() failed: %d\n", ret);
  41 -               hang();
  42 +               if (IS_ENABLED(CONFIG_DDR_RESET_ON_TRAINING_FAILURE) &&
  43 +                   get_boot_device() != BOOT_DEVICE_UART)
  44 +                       reset_cpu();
  45 +               else
  46 +                       hang();
  47         }
  48  #endif
  49