package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-platdata.c

   1 /*
   2  * DO NOT MODIFY
   3  *
   4  * This file was generated by dtoc from a .dtb (device tree binary) file.
   5  */
   6
   7 #include <common.h>
   8 #include <dm.h>
   9 #include <dt-structs.h>
  10
  11 static const struct dtd_rockchip_rk3328_grf dtv_syscon_at_ff100000 = {
  12         .reg                    = {0xff100000, 0x1000},
  13 };
  14 U_BOOT_DEVICE(syscon_at_ff100000) = {
  15         .name           = "rockchip_rk3328_grf",
  16         .platdata       = &dtv_syscon_at_ff100000,
  17         .platdata_size  = sizeof(dtv_syscon_at_ff100000),
  18 };
  19
  20 static const struct dtd_rockchip_rk3328_cru dtv_clock_controller_at_ff440000 = {
  21         .reg                    = {0xff440000, 0x1000},
  22         .rockchip_grf           = 0x3a,
  23 };
  24 U_BOOT_DEVICE(clock_controller_at_ff440000) = {
  25         .name           = "rockchip_rk3328_cru",
  26         .platdata       = &dtv_clock_controller_at_ff440000,
  27         .platdata_size  = sizeof(dtv_clock_controller_at_ff440000),
  28 };
  29
  30 static const struct dtd_rockchip_rk3328_uart dtv_serial_at_ff130000 = {
  31         .clock_frequency        = 0x16e3600,
  32         .clocks                 = {
  33                         {&dtv_clock_controller_at_ff440000, {40}},
  34                         {&dtv_clock_controller_at_ff440000, {212}},},
  35         .dma_names              = {"tx", "rx"},
  36         .dmas                   = {0x10, 0x6, 0x10, 0x7},
  37         .interrupts             = {0x0, 0x39, 0x4},
  38         .pinctrl_0              = 0x26,
  39         .pinctrl_names          = "default",
  40         .reg                    = {0xff130000, 0x100},
  41         .reg_io_width           = 0x4,
  42         .reg_shift              = 0x2,
  43 };
  44 U_BOOT_DEVICE(serial_at_ff130000) = {
  45         .name           = "rockchip_rk3328_uart",
  46         .platdata       = &dtv_serial_at_ff130000,
  47         .platdata_size  = sizeof(dtv_serial_at_ff130000),
  48 };
  49
  50 static const struct dtd_rockchip_rk3328_dw_mshc dtv_mmc_at_ff500000 = {
  51         .bus_width              = 0x4,
  52         .cap_mmc_highspeed      = true,
  53         .cap_sd_highspeed       = true,
  54         .clocks                 = {
  55                         {&dtv_clock_controller_at_ff440000, {317}},
  56                         {&dtv_clock_controller_at_ff440000, {33}},
  57                         {&dtv_clock_controller_at_ff440000, {74}},
  58                         {&dtv_clock_controller_at_ff440000, {78}},},
  59         .disable_wp             = true,
  60         .fifo_depth             = 0x100,
  61         .interrupts             = {0x0, 0xc, 0x4},
  62         .max_frequency          = 0x8f0d180,
  63         .pinctrl_0              = {0x47, 0x48, 0x49, 0x4a},
  64         .pinctrl_names          = "default",
  65         .reg                    = {0xff500000, 0x4000},
  66         .u_boot_spl_fifo_mode   = true,
  67         .vmmc_supply            = 0x4b,
  68         .vqmmc_supply           = 0x1e,
  69 };
  70 U_BOOT_DEVICE(mmc_at_ff500000) = {
  71         .name           = "rockchip_rk3328_dw_mshc",
  72         .platdata       = &dtv_mmc_at_ff500000,
  73         .platdata_size  = sizeof(dtv_mmc_at_ff500000),
  74 };
  75
  76 static const struct dtd_rockchip_rk3328_pinctrl dtv_pinctrl = {
  77         .ranges                 = true,
  78         .rockchip_grf           = 0x3a,
  79 };
  80 U_BOOT_DEVICE(pinctrl) = {
  81         .name           = "rockchip_rk3328_pinctrl",
  82         .platdata       = &dtv_pinctrl,
  83         .platdata_size  = sizeof(dtv_pinctrl),
  84 };
  85
  86 static const struct dtd_rockchip_gpio_bank dtv_gpio0_at_ff210000 = {
  87         .clocks                 = {
  88                         {&dtv_clock_controller_at_ff440000, {200}},},
  89         .gpio_controller        = true,
  90         .interrupt_controller   = true,
  91         .interrupts             = {0x0, 0x33, 0x4},
  92         .reg                    = {0xff210000, 0x100},
  93 };
  94 U_BOOT_DEVICE(gpio0_at_ff210000) = {
  95         .name           = "rockchip_gpio_bank",
  96         .platdata       = &dtv_gpio0_at_ff210000,
  97         .platdata_size  = sizeof(dtv_gpio0_at_ff210000),
  98 };
  99
 100 static const struct dtd_regulator_fixed dtv_sdmmc_regulator = {
 101         .gpio                   = {0x60, 0x1e, 0x1},
 102         .pinctrl_0              = 0x61,
 103         .pinctrl_names          = "default",
 104         .regulator_max_microvolt = 0x325aa0,
 105         .regulator_min_microvolt = 0x325aa0,
 106         .regulator_name         = "vcc_sd",
 107         .vin_supply             = 0x1c,
 108 };
 109 U_BOOT_DEVICE(sdmmc_regulator) = {
 110         .name           = "regulator_fixed",
 111         .platdata       = &dtv_sdmmc_regulator,
 112         .platdata_size  = sizeof(dtv_sdmmc_regulator),
 113 };
 114
 115 static const struct dtd_rockchip_rk3328_dmc dtv_dmc = {
 116         .reg                    = {0xff400000, 0x1000, 0xff780000, 0x3000, 0xff100000, 0x1000, 0xff440000, 0x1000,
 117                 0xff720000, 0x1000, 0xff798000, 0x1000},
 118         .rockchip_sdram_params  = {0x1, 0xa, 0x2, 0x1, 0x0, 0x0, 0x11, 0x0,
 119                 0x11, 0x0, 0x0, 0x94291288, 0x0, 0x27, 0x462, 0x15,
 120                 0x242, 0xff, 0x14d, 0x0, 0x1, 0x0, 0x0, 0x0,
 121                 0x43049010, 0x64, 0x28003b, 0xd0, 0x20053, 0xd4, 0x220000, 0xd8,
 122                 0x100, 0xdc, 0x40000, 0xe0, 0x0, 0xe4, 0x110000, 0xe8,
 123                 0x420, 0xec, 0x400, 0xf4, 0xf011f, 0x100, 0x9060b06, 0x104,
 124                 0x20209, 0x108, 0x505040a, 0x10c, 0x40400c, 0x110, 0x5030206, 0x114,
 125                 0x3030202, 0x120, 0x3030b03, 0x124, 0x20208, 0x180, 0x1000040, 0x184,
 126                 0x0, 0x190, 0x7030003, 0x198, 0x5001100, 0x1a0, 0xc0400003, 0x240,
 127                 0x6000604, 0x244, 0x201, 0x250, 0xf00, 0x490, 0x1, 0xffffffff,
 128                 0xffffffff, 0xffffffff, 0xffffffff, 0x4, 0xc, 0x28, 0xa, 0x2c,
 129                 0x0, 0x30, 0x9, 0xffffffff, 0xffffffff, 0x77, 0x88, 0x79,
 130                 0x79, 0x87, 0x97, 0x87, 0x78, 0x77, 0x78, 0x87,
 131                 0x88, 0x87, 0x87, 0x77, 0x78, 0x78, 0x78, 0x78,
 132                 0x78, 0x78, 0x78, 0x78, 0x78, 0x69, 0x9, 0x77,
 133                 0x78, 0x77, 0x78, 0x77, 0x78, 0x77, 0x78, 0x77,
 134                 0x79, 0x9, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78,
 135                 0x78, 0x78, 0x78, 0x69, 0x9, 0x77, 0x78, 0x77,
 136                 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x79, 0x9,
 137                 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78,
 138                 0x78, 0x69, 0x9, 0x77, 0x78, 0x77, 0x78, 0x77,
 139                 0x78, 0x77, 0x78, 0x77, 0x79, 0x9, 0x78, 0x78,
 140                 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x69,
 141                 0x9, 0x77, 0x78, 0x77, 0x77, 0x77, 0x77, 0x77,
 142                 0x77, 0x77, 0x79, 0x9},
 143 };
 144 U_BOOT_DEVICE(dmc) = {
 145         .name           = "rockchip_rk3328_dmc",
 146         .platdata       = &dtv_dmc,
 147         .platdata_size  = sizeof(dtv_dmc),
 148 };
 149