package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-platdata.c

   1 /*
   2  * DO NOT MODIFY
   3  *
   4  * This file was generated by dtoc from a .dtb (device tree binary) file.
   5  */
   6
   7 #include <common.h>
   8 #include <dm.h>
   9 #include <dt-structs.h>
  10
  11 static const struct dtd_rockchip_rk3328_grf dtv_syscon_at_ff100000 = {
  12         .reg                    = {0xff100000, 0x1000},
  13 };
  14 U_BOOT_DEVICE(syscon_at_ff100000) = {
  15         .name           = "rockchip_rk3328_grf",
  16         .platdata       = &dtv_syscon_at_ff100000,
  17         .platdata_size  = sizeof(dtv_syscon_at_ff100000),
  18 };
  19
  20 static const struct dtd_rockchip_rk3328_cru dtv_clock_controller_at_ff440000 = {
  21         .reg                    = {0xff440000, 0x1000},
  22         .rockchip_grf           = 0x3b,
  23 };
  24 U_BOOT_DEVICE(clock_controller_at_ff440000) = {
  25         .name           = "rockchip_rk3328_cru",
  26         .platdata       = &dtv_clock_controller_at_ff440000,
  27         .platdata_size  = sizeof(dtv_clock_controller_at_ff440000),
  28 };
  29
  30 static const struct dtd_rockchip_rk3328_uart dtv_serial_at_ff130000 = {
  31         .clock_frequency        = 0x16e3600,
  32         .clocks                 = {
  33                         {&dtv_clock_controller_at_ff440000, {40}},
  34                         {&dtv_clock_controller_at_ff440000, {212}},},
  35         .dma_names              = {"tx", "rx"},
  36         .dmas                   = {0x10, 0x6, 0x10, 0x7},
  37         .interrupts             = {0x0, 0x39, 0x4},
  38         .pinctrl_0              = 0x26,
  39         .pinctrl_names          = "default",
  40         .reg                    = {0xff130000, 0x100},
  41         .reg_io_width           = 0x4,
  42         .reg_shift              = 0x2,
  43 };
  44 U_BOOT_DEVICE(serial_at_ff130000) = {
  45         .name           = "rockchip_rk3328_uart",
  46         .platdata       = &dtv_serial_at_ff130000,
  47         .platdata_size  = sizeof(dtv_serial_at_ff130000),
  48 };
  49
  50 static const struct dtd_rockchip_rk3328_dw_mshc dtv_mmc_at_ff500000 = {
  51         .bus_width              = 0x4,
  52         .cap_sd_highspeed       = true,
  53         .clocks                 = {
  54                         {&dtv_clock_controller_at_ff440000, {317}},
  55                         {&dtv_clock_controller_at_ff440000, {33}},
  56                         {&dtv_clock_controller_at_ff440000, {74}},
  57                         {&dtv_clock_controller_at_ff440000, {78}},},
  58         .disable_wp             = true,
  59         .fifo_depth             = 0x100,
  60         .interrupts             = {0x0, 0xc, 0x4},
  61         .max_frequency          = 0x8f0d180,
  62         .pinctrl_0              = {0x48, 0x49, 0x4a, 0x4b},
  63         .pinctrl_names          = "default",
  64         .reg                    = {0xff500000, 0x4000},
  65         .sd_uhs_sdr104          = true,
  66         .sd_uhs_sdr12           = true,
  67         .sd_uhs_sdr25           = true,
  68         .sd_uhs_sdr50           = true,
  69         .u_boot_spl_fifo_mode   = true,
  70         .vmmc_supply            = 0x4c,
  71         .vqmmc_supply           = 0x1e,
  72 };
  73 U_BOOT_DEVICE(mmc_at_ff500000) = {
  74         .name           = "rockchip_rk3328_dw_mshc",
  75         .platdata       = &dtv_mmc_at_ff500000,
  76         .platdata_size  = sizeof(dtv_mmc_at_ff500000),
  77 };
  78
  79 static const struct dtd_rockchip_rk3328_pinctrl dtv_pinctrl = {
  80         .ranges                 = true,
  81         .rockchip_grf           = 0x3b,
  82 };
  83 U_BOOT_DEVICE(pinctrl) = {
  84         .name           = "rockchip_rk3328_pinctrl",
  85         .platdata       = &dtv_pinctrl,
  86         .platdata_size  = sizeof(dtv_pinctrl),
  87 };
  88
  89 static const struct dtd_rockchip_gpio_bank dtv_gpio0_at_ff210000 = {
  90         .clocks                 = {
  91                         {&dtv_clock_controller_at_ff440000, {200}},},
  92         .gpio_controller        = true,
  93         .interrupt_controller   = true,
  94         .interrupts             = {0x0, 0x33, 0x4},
  95         .reg                    = {0xff210000, 0x100},
  96 };
  97 U_BOOT_DEVICE(gpio0_at_ff210000) = {
  98         .name           = "rockchip_gpio_bank",
  99         .platdata       = &dtv_gpio0_at_ff210000,
 100         .platdata_size  = sizeof(dtv_gpio0_at_ff210000),
 101 };
 102
 103 static const struct dtd_regulator_fixed dtv_sdmmc_regulator = {
 104         .gpio                   = {0x61, 0x1e, 0x1},
 105         .pinctrl_0              = 0x68,
 106         .pinctrl_names          = "default",
 107         .regulator_boot_on      = true,
 108         .regulator_max_microvolt = 0x325aa0,
 109         .regulator_min_microvolt = 0x325aa0,
 110         .regulator_name         = "vcc_sd",
 111         .vin_supply             = 0x1c,
 112 };
 113 U_BOOT_DEVICE(sdmmc_regulator) = {
 114         .name           = "regulator_fixed",
 115         .platdata       = &dtv_sdmmc_regulator,
 116         .platdata_size  = sizeof(dtv_sdmmc_regulator),
 117 };
 118
 119 static const struct dtd_rockchip_rk3328_dmc dtv_dmc = {
 120         .reg                    = {0xff400000, 0x1000, 0xff780000, 0x3000, 0xff100000, 0x1000, 0xff440000, 0x1000,
 121                 0xff720000, 0x1000, 0xff798000, 0x1000},
 122         .rockchip_sdram_params  = {0x1, 0xa, 0x2, 0x1, 0x0, 0x0, 0x11, 0x0,
 123                 0x11, 0x0, 0x0, 0x94291288, 0x0, 0x27, 0x462, 0x15,
 124                 0x242, 0xff, 0x14d, 0x0, 0x1, 0x0, 0x0, 0x0,
 125                 0x43049010, 0x64, 0x28003b, 0xd0, 0x20053, 0xd4, 0x220000, 0xd8,
 126                 0x100, 0xdc, 0x40000, 0xe0, 0x0, 0xe4, 0x110000, 0xe8,
 127                 0x420, 0xec, 0x400, 0xf4, 0xf011f, 0x100, 0x9060b06, 0x104,
 128                 0x20209, 0x108, 0x505040a, 0x10c, 0x40400c, 0x110, 0x5030206, 0x114,
 129                 0x3030202, 0x120, 0x3030b03, 0x124, 0x20208, 0x180, 0x1000040, 0x184,
 130                 0x0, 0x190, 0x7030003, 0x198, 0x5001100, 0x1a0, 0xc0400003, 0x240,
 131                 0x6000604, 0x244, 0x201, 0x250, 0xf00, 0x490, 0x1, 0xffffffff,
 132                 0xffffffff, 0xffffffff, 0xffffffff, 0x4, 0xc, 0x28, 0xa, 0x2c,
 133                 0x0, 0x30, 0x9, 0xffffffff, 0xffffffff, 0x77, 0x88, 0x79,
 134                 0x79, 0x87, 0x97, 0x87, 0x78, 0x77, 0x78, 0x87,
 135                 0x88, 0x87, 0x87, 0x77, 0x78, 0x78, 0x78, 0x78,
 136                 0x78, 0x78, 0x78, 0x78, 0x78, 0x69, 0x9, 0x77,
 137                 0x78, 0x77, 0x78, 0x77, 0x78, 0x77, 0x78, 0x77,
 138                 0x79, 0x9, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78,
 139                 0x78, 0x78, 0x78, 0x69, 0x9, 0x77, 0x78, 0x77,
 140                 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x79, 0x9,
 141                 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78,
 142                 0x78, 0x69, 0x9, 0x77, 0x78, 0x77, 0x78, 0x77,
 143                 0x78, 0x77, 0x78, 0x77, 0x79, 0x9, 0x78, 0x78,
 144                 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x69,
 145                 0x9, 0x77, 0x78, 0x77, 0x77, 0x77, 0x77, 0x77,
 146                 0x77, 0x77, 0x79, 0x9},
 147 };
 148 U_BOOT_DEVICE(dmc) = {
 149         .name           = "rockchip_rk3328_dmc",
 150         .platdata       = &dtv_dmc,
 151         .platdata_size  = sizeof(dtv_dmc),
 152 };
 153