package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-platdata.c

   1 /*
   2  * DO NOT MODIFY
   3  *
   4  * This file was generated by dtoc from a .dtb (device tree binary) file.
   5  */
   6
   7 /* Allow use of U_BOOT_DEVICE() in this file */
   8 #define DT_PLATDATA_C
   9
  10 #include <common.h>
  11 #include <dm.h>
  12 #include <dt-structs.h>
  13
  14 /* Node /clock-controller@ff440000 index 0 */
  15 static struct dtd_rockchip_rk3328_cru dtv_clock_controller_at_ff440000 = {
  16         .reg                    = {0xff440000, 0x1000},
  17         .rockchip_grf           = 0x3a,
  18 };
  19 U_BOOT_DEVICE(clock_controller_at_ff440000) = {
  20         .name           = "rockchip_rk3328_cru",
  21         .platdata       = &dtv_clock_controller_at_ff440000,
  22         .platdata_size  = sizeof(dtv_clock_controller_at_ff440000),
  23         .parent_idx     = -1,
  24 };
  25
  26 /* Node /dmc index 1 */
  27 static struct dtd_rockchip_rk3328_dmc dtv_dmc = {
  28         .reg                    = {0xff400000, 0x1000, 0xff780000, 0x3000, 0xff100000, 0x1000, 0xff440000, 0x1000,
  29                 0xff720000, 0x1000, 0xff798000, 0x1000},
  30         .rockchip_sdram_params  = {0x1, 0xa, 0x2, 0x1, 0x0, 0x0, 0x11, 0x0,
  31                 0x11, 0x0, 0x0, 0x94291288, 0x0, 0x27, 0x462, 0x15,
  32                 0x242, 0xff, 0x14d, 0x0, 0x1, 0x0, 0x0, 0x0,
  33                 0x43049010, 0x64, 0x28003b, 0xd0, 0x20053, 0xd4, 0x220000, 0xd8,
  34                 0x100, 0xdc, 0x40000, 0xe0, 0x0, 0xe4, 0x110000, 0xe8,
  35                 0x420, 0xec, 0x400, 0xf4, 0xf011f, 0x100, 0x9060b06, 0x104,
  36                 0x20209, 0x108, 0x505040a, 0x10c, 0x40400c, 0x110, 0x5030206, 0x114,
  37                 0x3030202, 0x120, 0x3030b03, 0x124, 0x20208, 0x180, 0x1000040, 0x184,
  38                 0x0, 0x190, 0x7030003, 0x198, 0x5001100, 0x1a0, 0xc0400003, 0x240,
  39                 0x6000604, 0x244, 0x201, 0x250, 0xf00, 0x490, 0x1, 0xffffffff,
  40                 0xffffffff, 0xffffffff, 0xffffffff, 0x4, 0xc, 0x28, 0xa, 0x2c,
  41                 0x0, 0x30, 0x9, 0xffffffff, 0xffffffff, 0x77, 0x88, 0x79,
  42                 0x79, 0x87, 0x97, 0x87, 0x78, 0x77, 0x78, 0x87,
  43                 0x88, 0x87, 0x87, 0x77, 0x78, 0x78, 0x78, 0x78,
  44                 0x78, 0x78, 0x78, 0x78, 0x78, 0x69, 0x9, 0x77,
  45                 0x78, 0x77, 0x78, 0x77, 0x78, 0x77, 0x78, 0x77,
  46                 0x79, 0x9, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78,
  47                 0x78, 0x78, 0x78, 0x69, 0x9, 0x77, 0x78, 0x77,
  48                 0x77, 0x77, 0x77, 0x77, 0x77, 0x77, 0x79, 0x9,
  49                 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78,
  50                 0x78, 0x69, 0x9, 0x77, 0x78, 0x77, 0x78, 0x77,
  51                 0x78, 0x77, 0x78, 0x77, 0x79, 0x9, 0x78, 0x78,
  52                 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x78, 0x69,
  53                 0x9, 0x77, 0x78, 0x77, 0x77, 0x77, 0x77, 0x77,
  54                 0x77, 0x77, 0x79, 0x9},
  55 };
  56 U_BOOT_DEVICE(dmc) = {
  57         .name           = "rockchip_rk3328_dmc",
  58         .platdata       = &dtv_dmc,
  59         .platdata_size  = sizeof(dtv_dmc),
  60         .parent_idx     = -1,
  61 };
  62
  63 /* Node /pinctrl/gpio0@ff210000 index 2 */
  64 static struct dtd_rockchip_gpio_bank dtv_gpio0_at_ff210000 = {
  65         .clocks                 = {
  66                         {0, {200}},},
  67         .gpio_controller        = true,
  68         .interrupt_controller   = true,
  69         .interrupts             = {0x0, 0x33, 0x4},
  70         .reg                    = {0xff210000, 0x100},
  71 };
  72 U_BOOT_DEVICE(gpio0_at_ff210000) = {
  73         .name           = "rockchip_gpio_bank",
  74         .platdata       = &dtv_gpio0_at_ff210000,
  75         .platdata_size  = sizeof(dtv_gpio0_at_ff210000),
  76         .parent_idx     = 4,
  77 };
  78
  79 /* Node /mmc@ff500000 index 3 */
  80 static struct dtd_rockchip_rk3288_dw_mshc dtv_mmc_at_ff500000 = {
  81         .bus_width              = 0x4,
  82         .cap_mmc_highspeed      = true,
  83         .cap_sd_highspeed       = true,
  84         .clocks                 = {
  85                         {0, {317}},
  86                         {0, {33}},
  87                         {0, {74}},
  88                         {0, {78}},},
  89         .disable_wp             = true,
  90         .fifo_depth             = 0x100,
  91         .interrupts             = {0x0, 0xc, 0x4},
  92         .max_frequency          = 0x8f0d180,
  93         .pinctrl_0              = {0x47, 0x48, 0x49, 0x4a},
  94         .pinctrl_names          = "default",
  95         .reg                    = {0xff500000, 0x4000},
  96         .u_boot_spl_fifo_mode   = true,
  97         .vmmc_supply            = 0x4b,
  98         .vqmmc_supply           = 0x1e,
  99 };
 100 U_BOOT_DEVICE(mmc_at_ff500000) = {
 101         .name           = "rockchip_rk3288_dw_mshc",
 102         .platdata       = &dtv_mmc_at_ff500000,
 103         .platdata_size  = sizeof(dtv_mmc_at_ff500000),
 104         .parent_idx     = -1,
 105 };
 106
 107 /* Node /pinctrl index 4 */
 108 static struct dtd_rockchip_rk3328_pinctrl dtv_pinctrl = {
 109         .ranges                 = true,
 110         .rockchip_grf           = 0x3a,
 111 };
 112 U_BOOT_DEVICE(pinctrl) = {
 113         .name           = "rockchip_rk3328_pinctrl",
 114         .platdata       = &dtv_pinctrl,
 115         .platdata_size  = sizeof(dtv_pinctrl),
 116         .parent_idx     = -1,
 117 };
 118
 119 /* Node /sdmmc-regulator index 5 */
 120 static struct dtd_regulator_fixed dtv_sdmmc_regulator = {
 121         .gpio                   = {0x60, 0x1e, 0x1},
 122         .pinctrl_0              = 0x61,
 123         .pinctrl_names          = "default",
 124         .regulator_max_microvolt = 0x325aa0,
 125         .regulator_min_microvolt = 0x325aa0,
 126         .regulator_name         = "vcc_sd",
 127         .vin_supply             = 0x1c,
 128 };
 129 U_BOOT_DEVICE(sdmmc_regulator) = {
 130         .name           = "regulator_fixed",
 131         .platdata       = &dtv_sdmmc_regulator,
 132         .platdata_size  = sizeof(dtv_sdmmc_regulator),
 133         .parent_idx     = -1,
 134 };
 135
 136 /* Node /serial@ff130000 index 6 */
 137 static struct dtd_ns16550_serial dtv_serial_at_ff130000 = {
 138         .clock_frequency        = 0x16e3600,
 139         .clocks                 = {
 140                         {0, {40}},
 141                         {0, {212}},},
 142         .dma_names              = {"tx", "rx"},
 143         .dmas                   = {0x10, 0x6, 0x10, 0x7},
 144         .interrupts             = {0x0, 0x39, 0x4},
 145         .pinctrl_0              = 0x26,
 146         .pinctrl_names          = "default",
 147         .reg                    = {0xff130000, 0x100},
 148         .reg_io_width           = 0x4,
 149         .reg_shift              = 0x2,
 150 };
 151 U_BOOT_DEVICE(serial_at_ff130000) = {
 152         .name           = "ns16550_serial",
 153         .platdata       = &dtv_serial_at_ff130000,
 154         .platdata_size  = sizeof(dtv_serial_at_ff130000),
 155         .parent_idx     = -1,
 156 };
 157
 158 /* Node /syscon@ff100000 index 7 */
 159 static struct dtd_rockchip_rk3328_grf dtv_syscon_at_ff100000 = {
 160         .reg                    = {0xff100000, 0x1000},
 161 };
 162 U_BOOT_DEVICE(syscon_at_ff100000) = {
 163         .name           = "rockchip_rk3328_grf",
 164         .platdata       = &dtv_syscon_at_ff100000,
 165         .platdata_size  = sizeof(dtv_syscon_at_ff100000),
 166         .parent_idx     = -1,
 167 };
 168
 169 void dm_populate_phandle_data(void) {
 170 }