package/boot/uboot-rockchip/src/of-platdata/nanopi-r2s-rk3328/dt-structs-gen.h

   1 /*
   2  * DO NOT MODIFY
   3  *
   4  * This file was generated by dtoc from a .dtb (device tree binary) file.
   5  */
   6
   7 #include <stdbool.h>
   8 #include <linux/libfdt.h>
   9 struct dtd_regulator_fixed {
  10         fdt32_t         gpio[3];
  11         fdt32_t         pinctrl_0;
  12         const char *    pinctrl_names;
  13         bool            regulator_boot_on;
  14         fdt32_t         regulator_max_microvolt;
  15         fdt32_t         regulator_min_microvolt;
  16         const char *    regulator_name;
  17         fdt32_t         vin_supply;
  18 };
  19 struct dtd_rockchip_gpio_bank {
  20         struct phandle_1_arg clocks[1];
  21         bool            gpio_controller;
  22         bool            interrupt_controller;
  23         fdt32_t         interrupts[3];
  24         fdt64_t         reg[2];
  25 };
  26 struct dtd_rockchip_rk3328_cru {
  27         fdt64_t         reg[2];
  28         fdt32_t         rockchip_grf;
  29 };
  30 struct dtd_rockchip_rk3328_dmc {
  31         fdt64_t         reg[12];
  32         fdt32_t         rockchip_sdram_params[196];
  33 };
  34 struct dtd_rockchip_rk3328_dw_mshc {
  35         fdt32_t         bus_width;
  36         bool            cap_sd_highspeed;
  37         struct phandle_1_arg clocks[4];
  38         bool            disable_wp;
  39         fdt32_t         fifo_depth;
  40         fdt32_t         interrupts[3];
  41         fdt32_t         max_frequency;
  42         fdt32_t         pinctrl_0[4];
  43         const char *    pinctrl_names;
  44         fdt64_t         reg[2];
  45         bool            sd_uhs_sdr104;
  46         bool            sd_uhs_sdr12;
  47         bool            sd_uhs_sdr25;
  48         bool            sd_uhs_sdr50;
  49         bool            u_boot_spl_fifo_mode;
  50         fdt32_t         vmmc_supply;
  51         fdt32_t         vqmmc_supply;
  52 };
  53 struct dtd_rockchip_rk3328_grf {
  54         fdt64_t         reg[2];
  55 };
  56 struct dtd_rockchip_rk3328_pinctrl {
  57         bool            ranges;
  58         fdt32_t         rockchip_grf;
  59 };
  60 struct dtd_rockchip_rk3328_uart {
  61         fdt32_t         clock_frequency;
  62         struct phandle_1_arg clocks[2];
  63         const char *    dma_names[2];
  64         fdt32_t         dmas[4];
  65         fdt32_t         interrupts[3];
  66         fdt32_t         pinctrl_0;
  67         const char *    pinctrl_names;
  68         fdt64_t         reg[2];
  69         fdt32_t         reg_io_width;
  70         fdt32_t         reg_shift;
  71 };
  72 #define dtd_syscon dtd_rockchip_rk3328_cru
  73 #define dtd_simple_mfd dtd_rockchip_rk3328_grf
  74 #define dtd_snps_dw_apb_uart dtd_rockchip_rk3328_uart
  75 #define dtd_rockchip_cru dtd_rockchip_rk3328_cru
  76 #define dtd_rockchip_rk3288_dw_mshc dtd_rockchip_rk3328_dw_mshc