90c2a4af27ba3366471188eb077c09d37307fd26
[openwrt/openwrt.git] / package / kernel / mac80211 / patches / 652-0012-rtl8xxxu-gen1-Add-module-parameters-to-adjust-DMA-ag.patch
1 From fd83f12278262feccd012b62c30643bd6a6c2888 Mon Sep 17 00:00:00 2001
2 From: Jes Sorensen <Jes.Sorensen@redhat.com>
3 Date: Mon, 27 Jun 2016 12:32:10 -0400
4 Subject: [PATCH] rtl8xxxu: gen1: Add module parameters to adjust DMA
5 aggregation parameters
6
7 This allows the user to specify DMA aggregation timout and block
8 count. Blocks are presumably always 512 bytes, so the minimum block
9 count is 6 for 802.11 packets.
10
11 Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
12 Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
13 ---
14 .../net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c | 28 ++++++++++++++++++++++
15 1 file changed, 28 insertions(+)
16
17 --- a/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
18 +++ b/drivers/net/wireless/realtek/rtl8xxxu/rtl8xxxu_core.c
19 @@ -45,6 +45,8 @@
20 int rtl8xxxu_debug = RTL8XXXU_DEBUG_EFUSE;
21 static bool rtl8xxxu_ht40_2g;
22 static bool rtl8xxxu_dma_aggregation;
23 +static int rtl8xxxu_dma_agg_timeout = -1;
24 +static int rtl8xxxu_dma_agg_pages = -1;
25
26 MODULE_AUTHOR("Jes Sorensen <Jes.Sorensen@redhat.com>");
27 MODULE_DESCRIPTION("RTL8XXXu USB mac80211 Wireless LAN Driver");
28 @@ -65,6 +67,10 @@ module_param_named(ht40_2g, rtl8xxxu_ht4
29 MODULE_PARM_DESC(ht40_2g, "Enable HT40 support on the 2.4GHz band");
30 module_param_named(dma_aggregation, rtl8xxxu_dma_aggregation, bool, 0600);
31 MODULE_PARM_DESC(dma_aggregation, "Enable DMA packet aggregation");
32 +module_param_named(dma_agg_timeout, rtl8xxxu_dma_agg_timeout, int, 0600);
33 +MODULE_PARM_DESC(dma_agg_timeout, "Set DMA aggregation timeout (range 1-127)");
34 +module_param_named(dma_agg_pages, rtl8xxxu_dma_agg_pages, int, 0600);
35 +MODULE_PARM_DESC(dma_agg_pages, "Set DMA aggregation pages (range 1-127, 0 to disable)");
36
37 #define USB_VENDOR_ID_REALTEK 0x0bda
38 #define RTL8XXXU_RX_URBS 32
39 @@ -4441,6 +4447,18 @@ void rtl8xxxu_gen1_init_aggregation(stru
40 */
41
42 page_thresh = (priv->fops->rx_agg_buf_size / 512);
43 + if (rtl8xxxu_dma_agg_pages >= 0) {
44 + if (rtl8xxxu_dma_agg_pages <= page_thresh)
45 + timeout = page_thresh;
46 + else if (rtl8xxxu_dma_agg_pages <= 6)
47 + dev_err(&priv->udev->dev,
48 + "%s: dma_agg_pages=%i too small, minium is 6\n",
49 + __func__, rtl8xxxu_dma_agg_pages);
50 + else
51 + dev_err(&priv->udev->dev,
52 + "%s: dma_agg_pages=%i larger than limit %i\n",
53 + __func__, rtl8xxxu_dma_agg_pages, page_thresh);
54 + }
55 rtl8xxxu_write8(priv, REG_RXDMA_AGG_PG_TH, page_thresh);
56 /*
57 * REG_RXDMA_AGG_PG_TH + 1 seems to be the timeout register on
58 @@ -4448,6 +4466,16 @@ void rtl8xxxu_gen1_init_aggregation(stru
59 * don't set it, so better set both.
60 */
61 timeout = 4;
62 +
63 + if (rtl8xxxu_dma_agg_timeout >= 0) {
64 + if (rtl8xxxu_dma_agg_timeout <= 127)
65 + timeout = rtl8xxxu_dma_agg_timeout;
66 + else
67 + dev_err(&priv->udev->dev,
68 + "%s: Invalid dma_agg_timeout: %i\n",
69 + __func__, rtl8xxxu_dma_agg_timeout);
70 + }
71 +
72 rtl8xxxu_write8(priv, REG_RXDMA_AGG_PG_TH + 1, timeout);
73 rtl8xxxu_write8(priv, REG_USB_DMA_AGG_TO, timeout);
74 priv->rx_buf_aggregation = 1;