package/kernel/mac80211/patches/rt2x00/983-rt2x00-add-r-calibration.patch

   1 From: =?UTF-8?q?Tomislav=20Po=C5=BEega?= <pozega.tomislav@gmail.com>
   2 Date: Mon, 8 Jan 2018 13:42:58 +0100
   3 Subject: [PATCH] rt2x00: add r calibration
   4 MIME-Version: 1.0
   5 Content-Type: text/plain; charset=UTF-8
   6 Content-Transfer-Encoding: 8bit
   7
   8 Add r calibration code as found in mtk driver.
   9
  10 Signed-off-by: Tomislav Požega <pozega.tomislav@gmail.com>
  11 ---
  12  .../net/wireless/ralink/rt2x00/rt2800lib.c    | 150 ++++++++++++++++++
  13  1 file changed, 150 insertions(+)
  14
  15 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
  16 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
  17 @@ -8488,6 +8488,155 @@ static void rt2800_rf_self_txdc_cal(stru
  18         rt2x00_info(rt2x00dev, "RF Tx self calibration end\n");
  19  }
  20
  21 +static int rt2800_calcrcalibrationcode(struct rt2x00_dev *rt2x00dev, int d1, int d2)
  22 +{
  23 +       int calcode;
  24 +       calcode = ((d2 - d1) * 1000) / 43;
  25 +       if ((calcode%10) >= 5)
  26 +               calcode += 10;
  27 +       calcode = (calcode / 10);
  28 +
  29 +       return calcode;
  30 +}
  31 +
  32 +static void rt2800_r_calibration(struct rt2x00_dev *rt2x00dev)
  33 +{
  34 +       u32 savemacsysctrl;
  35 +       u8 saverfb0r1, saverfb0r34, saverfb0r35;
  36 +       u8 saverfb5r4, saverfb5r17, saverfb5r18;
  37 +       u8 saverfb5r19, saverfb5r20;
  38 +       u8 savebbpr22, savebbpr47, savebbpr49;
  39 +       u8 bytevalue = 0;
  40 +       int rcalcode;
  41 +       u8 r_cal_code = 0;
  42 +       char d1 = 0, d2 = 0;
  43 +       u8 rfvalue;
  44 +       u32 MAC_RF_BYPASS0, MAC_RF_CONTROL0, MAC_PWR_PIN_CFG;
  45 +       u32 maccfg, macstatus;
  46 +       int i;
  47 +
  48 +       saverfb0r1 = rt2800_rfcsr_read_bank(rt2x00dev, 0, 1);
  49 +       saverfb0r34 = rt2800_rfcsr_read_bank(rt2x00dev, 0, 34);
  50 +       saverfb0r35 = rt2800_rfcsr_read_bank(rt2x00dev, 0, 35);
  51 +       saverfb5r4 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 4);
  52 +       saverfb5r17 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 17);
  53 +       saverfb5r18 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 18);
  54 +       saverfb5r19 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 19);
  55 +       saverfb5r20 = rt2800_rfcsr_read_bank(rt2x00dev, 5, 20);
  56 +
  57 +       savebbpr22 = rt2800_bbp_read(rt2x00dev, 22);
  58 +       savebbpr47 = rt2800_bbp_read(rt2x00dev, 47);
  59 +       savebbpr49 = rt2800_bbp_read(rt2x00dev, 49);
  60 +
  61 +       savemacsysctrl = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
  62 +       MAC_RF_BYPASS0 = rt2800_register_read(rt2x00dev, RF_BYPASS0);
  63 +       MAC_RF_CONTROL0 = rt2800_register_read(rt2x00dev, RF_CONTROL0);
  64 +       MAC_PWR_PIN_CFG = rt2800_register_read(rt2x00dev, PWR_PIN_CFG);
  65 +
  66 +       maccfg = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
  67 +       maccfg &= (~0x04);
  68 +       rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, maccfg);
  69 +
  70 +       for (i = 0; i < 10000; i++) {
  71 +               macstatus = rt2800_register_read(rt2x00dev, MAC_STATUS_CFG);
  72 +               if (macstatus & 0x1)
  73 +                       udelay(50);
  74 +               else
  75 +                       break;
  76 +       }
  77 +
  78 +       if (i == 10000)
  79 +               rt2x00_warn(rt2x00dev, "Wait MAC Tx Status to MAX !!!\n");
  80 +
  81 +       maccfg = rt2800_register_read(rt2x00dev, MAC_SYS_CTRL);
  82 +       maccfg &= (~0x04);
  83 +       rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, maccfg);
  84 +
  85 +       for (i = 0; i < 10000; i++) {
  86 +               macstatus = rt2800_register_read(rt2x00dev, MAC_STATUS_CFG);
  87 +               if (macstatus & 0x2)
  88 +                       udelay(50);
  89 +               else
  90 +                       break;
  91 +               }
  92 +
  93 +       if (i == 10000)
  94 +               rt2x00_warn(rt2x00dev, "Wait MAC Rx Status to MAX !!!\n");
  95 +
  96 +       rfvalue = (MAC_RF_BYPASS0 | 0x3004);
  97 +       rt2800_register_write(rt2x00dev, RF_BYPASS0, rfvalue);
  98 +       rfvalue = (MAC_RF_CONTROL0 | (~0x3002));
  99 +       rt2800_register_write(rt2x00dev, RF_CONTROL0, rfvalue);
 100 +
 101 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, 0x27);
 102 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 17, 0x80);
 103 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 18, 0x83);
 104 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 19, 0x00);
 105 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 20, 0x20);
 106 +
 107 +       rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, 0x00);
 108 +       rt2800_rfcsr_write_bank(rt2x00dev, 0, 34, 0x13);
 109 +       rt2800_rfcsr_write_bank(rt2x00dev, 0, 35, 0x00);
 110 +
 111 +       rt2800_register_write(rt2x00dev, PWR_PIN_CFG, 0x1);
 112 +
 113 +       rt2800_bbp_write(rt2x00dev, 47, 0x04);
 114 +       rt2800_bbp_write(rt2x00dev, 22, 0x80);
 115 +       udelay(100);
 116 +       bytevalue = rt2800_bbp_read(rt2x00dev, 49);
 117 +       if (bytevalue > 128)
 118 +               d1 = bytevalue - 256;
 119 +       else
 120 +               d1 = (char)bytevalue;
 121 +       rt2800_bbp_write(rt2x00dev, 22, 0x0);
 122 +       rt2800_rfcsr_write_bank(rt2x00dev, 0, 35, 0x01);
 123 +
 124 +       rt2800_bbp_write(rt2x00dev, 22, 0x80);
 125 +       udelay(100);
 126 +       bytevalue = rt2800_bbp_read(rt2x00dev, 49);
 127 +       if (bytevalue > 128)
 128 +               d2 = bytevalue - 256;
 129 +       else
 130 +               d2 = (char)bytevalue;
 131 +       rt2800_bbp_write(rt2x00dev, 22, 0x0);
 132 +
 133 +       rcalcode = rt2800_calcrcalibrationcode(rt2x00dev, d1, d2);
 134 +       if (rcalcode < 0)
 135 +               r_cal_code = 256 + rcalcode;
 136 +       else
 137 +               r_cal_code = (u8)rcalcode;
 138 +
 139 +       rt2800_rfcsr_write_bank(rt2x00dev, 0, 7, r_cal_code);
 140 +
 141 +       rt2800_bbp_write(rt2x00dev, 22, 0x0);
 142 +
 143 +       bytevalue = rt2800_bbp_read(rt2x00dev, 21);
 144 +       bytevalue |= 0x1;
 145 +       rt2800_bbp_write(rt2x00dev, 21, bytevalue);
 146 +       bytevalue = rt2800_bbp_read(rt2x00dev, 21);
 147 +       bytevalue &= (~0x1);
 148 +       rt2800_bbp_write(rt2x00dev, 21, bytevalue);
 149 +
 150 +       rt2800_rfcsr_write_bank(rt2x00dev, 0, 1, saverfb0r1);
 151 +       rt2800_rfcsr_write_bank(rt2x00dev, 0, 34, saverfb0r34);
 152 +       rt2800_rfcsr_write_bank(rt2x00dev, 0, 35, saverfb0r35);
 153 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 4, saverfb5r4);
 154 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 17, saverfb5r17);
 155 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 18, saverfb5r18);
 156 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 19, saverfb5r19);
 157 +       rt2800_rfcsr_write_bank(rt2x00dev, 5, 20, saverfb5r20);
 158 +
 159 +       rt2800_bbp_write(rt2x00dev, 22, savebbpr22);
 160 +       rt2800_bbp_write(rt2x00dev, 47, savebbpr47);
 161 +       rt2800_bbp_write(rt2x00dev, 49, savebbpr49);
 162 +
 163 +       rt2800_register_write(rt2x00dev, RF_BYPASS0, MAC_RF_BYPASS0);
 164 +       rt2800_register_write(rt2x00dev, RF_CONTROL0, MAC_RF_CONTROL0);
 165 +
 166 +       rt2800_register_write(rt2x00dev, MAC_SYS_CTRL, savemacsysctrl);
 167 +       rt2800_register_write(rt2x00dev, PWR_PIN_CFG, MAC_PWR_PIN_CFG);
 168 +}
 169 +
 170  static void rt2800_bbp_core_soft_reset(struct rt2x00_dev *rt2x00dev,
 171                                        bool set_bw, bool is_ht40)
 172  {
 173 @@ -9095,6 +9244,7 @@ static void rt2800_init_rfcsr_6352(struc
 174         rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
 175         rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
 176
 177 +       rt2800_r_calibration(rt2x00dev);
 178         rt2800_rf_self_txdc_cal(rt2x00dev);
 179         rt2800_bw_filter_calibration(rt2x00dev, true);
 180         rt2800_bw_filter_calibration(rt2x00dev, false);