package/kernel/mac80211/patches/rt2x00/994-rt2x00-import-support-for-external-LNA-on-MT7620.patch

   1 From 0fce1109f894ec7fcd72cb098843a1eff786716a Mon Sep 17 00:00:00 2001
   2 From: Daniel Golle <daniel@makrotopia.org>
   3 Date: Fri, 16 Sep 2022 20:49:42 +0100
   4 Subject: [PATCH 16/16] rt2x00: import support for external LNA on MT7620
   5 To: linux-wireless@vger.kernel.org,
   6     Stanislaw Gruszka <stf_xl@wp.pl>,
   7     Helmut Schaa <helmut.schaa@googlemail.com>
   8 Cc: Kalle Valo <kvalo@kernel.org>,
   9     David S. Miller <davem@davemloft.net>,
  10     Eric Dumazet <edumazet@google.com>,
  11     Jakub Kicinski <kuba@kernel.org>,
  12     Paolo Abeni <pabeni@redhat.com>,
  13     Johannes Berg <johannes.berg@intel.com>
  14
  15 In order to carry out calibration on boards with ePA or eLNA the PA pin
  16 needs to be switch to GPIO mode on MT7620. Implement that by selecting
  17 pinctrl state "pa_gpio" which should be defined for MT7620 boards with
  18 eLNA or ePA beside the "default" state.
  19
  20 Reported-by: Serge Vasilugin <vasilugin@yandex.ru>
  21 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  22 ---
  23  .../net/wireless/ralink/rt2x00/rt2800lib.c    | 58 +++++++++++++++++++
  24  drivers/net/wireless/ralink/rt2x00/rt2x00.h   |  5 ++
  25  .../net/wireless/ralink/rt2x00/rt2x00soc.c    | 15 +++++
  26  3 files changed, 78 insertions(+)
  27
  28 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
  29 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
  30 @@ -304,6 +304,24 @@ static void rt2800_rf_write(struct rt2x0
  31         mutex_unlock(&rt2x00dev->csr_mutex);
  32  }
  33
  34 +void rt6352_enable_pa_pin(struct rt2x00_dev *rt2x00dev, int enable)
  35 +{
  36 +       if (!rt2x00dev->pinctrl)
  37 +               return;
  38 +
  39 +       if (enable) {
  40 +               if (!rt2x00dev->pins_default)
  41 +                       return;
  42 +
  43 +               pinctrl_select_state(rt2x00dev->pinctrl, rt2x00dev->pins_default);
  44 +       } else {
  45 +               if (!rt2x00dev->pins_pa_gpio)
  46 +                       return;
  47 +
  48 +               pinctrl_select_state(rt2x00dev->pinctrl, rt2x00dev->pins_pa_gpio);
  49 +       }
  50 +}
  51 +
  52  static const unsigned int rt2800_eeprom_map[EEPROM_WORD_COUNT] = {
  53         [EEPROM_CHIP_ID]                = 0x0000,
  54         [EEPROM_VERSION]                = 0x0001,
  55 @@ -4469,6 +4487,29 @@ static void rt2800_config_channel(struct
  56                         rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN,
  57                                               0x6C6C6B6C);
  58                 }
  59 +
  60 +               if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
  61 +                       reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
  62 +                       reg |= 0x00000101;
  63 +                       rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
  64 +
  65 +                       reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
  66 +                       reg |= 0x00000101;
  67 +                       rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
  68 +
  69 +                       rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
  70 +                       rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
  71 +                       rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42);
  72 +                       rt2800_bbp_write(rt2x00dev, 75, 0x68);
  73 +                       rt2800_bbp_write(rt2x00dev, 76, 0x4C);
  74 +                       rt2800_bbp_write(rt2x00dev, 79, 0x1C);
  75 +                       rt2800_bbp_write(rt2x00dev, 80, 0x0C);
  76 +                       rt2800_bbp_write(rt2x00dev, 82, 0xB6);
  77 +                       /* bank 0 RF reg 42 and glrt BBP reg 141 will be set in
  78 +                        * config channel function in dependence of channel and
  79 +                        * HT20/HT40 so don't touch it
  80 +                        */
  81 +               }
  82         }
  83
  84         bbp = rt2800_bbp_read(rt2x00dev, 4);
  85 @@ -10583,6 +10624,7 @@ static void rt2800_init_rfcsr_6352(struc
  86         rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
  87         rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
  88
  89 +       rt6352_enable_pa_pin(rt2x00dev, 0);
  90         rt2800_r_calibration(rt2x00dev);
  91         rt2800_rf_self_txdc_cal(rt2x00dev);
  92         rt2800_rxdcoc_calibration(rt2x00dev);
  93 @@ -10590,6 +10632,22 @@ static void rt2800_init_rfcsr_6352(struc
  94         rt2800_bw_filter_calibration(rt2x00dev, false);
  95         rt2800_loft_iq_calibration(rt2x00dev);
  96         rt2800_rxiq_calibration(rt2x00dev);
  97 +       rt6352_enable_pa_pin(rt2x00dev, 1);
  98 +
  99 +       if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
 100 +               rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
 101 +               rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
 102 +               rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42);
 103 +               rt2800_bbp_write(rt2x00dev, 75, 0x68);
 104 +               rt2800_bbp_write(rt2x00dev, 76, 0x4C);
 105 +               rt2800_bbp_write(rt2x00dev, 79, 0x1C);
 106 +               rt2800_bbp_write(rt2x00dev, 80, 0x0C);
 107 +               rt2800_bbp_write(rt2x00dev, 82, 0xB6);
 108 +               /* bank 0 RF reg 42 and glrt BBP reg 141 will be set in config
 109 +                * channel function in dependence of channel and HT20/HT40,
 110 +                * so don't touch them here.
 111 +                */
 112 +       }
 113  }
 114
 115  static void rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
 116 --- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
 117 +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
 118 @@ -28,6 +28,7 @@
 119  #include <linux/average.h>
 120  #include <linux/usb.h>
 121  #include <linux/clk.h>
 122 +#include <linux/pinctrl/consumer.h>
 123  #include <linux/rt2x00_platform.h>
 124
 125  #include <net/mac80211.h>
 126 @@ -1029,6 +1030,11 @@ struct rt2x00_dev {
 127
 128         /* Clock for System On Chip devices. */
 129         struct clk *clk;
 130 +
 131 +       /* pinctrl and states for System On Chip devices with PA/LNA. */
 132 +       struct pinctrl *pinctrl;
 133 +       struct pinctrl_state *pins_default;
 134 +       struct pinctrl_state *pins_pa_gpio;
 135  };
 136
 137  struct rt2x00_bar_list_entry {
 138 --- a/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
 139 +++ b/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
 140 @@ -97,6 +97,21 @@ int rt2x00soc_probe(struct platform_devi
 141         if (retval)
 142                 goto exit_free_reg;
 143
 144 +       rt2x00dev->pinctrl = devm_pinctrl_get(&pdev->dev);
 145 +       if (IS_ERR(rt2x00dev->pinctrl)) {
 146 +               rt2x00dev->pinctrl = NULL;
 147 +               rt2x00dev->pins_default = NULL;
 148 +               rt2x00dev->pins_pa_gpio = NULL;
 149 +       } else {
 150 +               rt2x00dev->pins_default = pinctrl_lookup_state(rt2x00dev->pinctrl, "default");
 151 +               if (IS_ERR(rt2x00dev->pins_default))
 152 +                       rt2x00dev->pins_default = NULL;
 153 +
 154 +               rt2x00dev->pins_pa_gpio = pinctrl_lookup_state(rt2x00dev->pinctrl, "pa_gpio");
 155 +               if (IS_ERR(rt2x00dev->pins_pa_gpio))
 156 +                       rt2x00dev->pins_pa_gpio = NULL;
 157 +       }
 158 +
 159         return 0;
 160
 161  exit_free_reg: