target/linux/adm5120/files-3.18/arch/mips/adm5120/common/irq.c

   1 /*
   2  *  ADM5120 specific interrupt handlers
   3  *
   4  *  Copyright (C) 2007-2008 Gabor Juhos <juhosg@openwrt.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License version 2 as published
   8  *  by the Free Software Foundation.
   9  *
  10  */
  11
  12 #include <linux/init.h>
  13 #include <linux/kernel.h>
  14 #include <linux/version.h>
  15 #include <linux/irq.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/ioport.h>
  18 #include <linux/io.h>
  19 #include <linux/bitops.h>
  20
  21 #include <asm/irq_cpu.h>
  22 #include <asm/mipsregs.h>
  23
  24 #include <asm/mach-adm5120/adm5120_defs.h>
  25
  26 static void adm5120_intc_irq_unmask(struct irq_data *d);
  27 static void adm5120_intc_irq_mask(struct irq_data *d);
  28 static int  adm5120_intc_irq_set_type(struct irq_data *d, unsigned int flow_type);
  29
  30 static inline void intc_write_reg(unsigned int reg, u32 val)
  31 {
  32         void __iomem *base = (void __iomem *)KSEG1ADDR(ADM5120_INTC_BASE);
  33
  34         __raw_writel(val, base + reg);
  35 }
  36
  37 static inline u32 intc_read_reg(unsigned int reg)
  38 {
  39         void __iomem *base = (void __iomem *)KSEG1ADDR(ADM5120_INTC_BASE);
  40
  41         return __raw_readl(base + reg);
  42 }
  43
  44 static struct irq_chip adm5120_intc_irq_chip = {
  45         .name           = "INTC",
  46         .irq_unmask     = adm5120_intc_irq_unmask,
  47         .irq_mask       = adm5120_intc_irq_mask,
  48         .irq_mask_ack   = adm5120_intc_irq_mask,
  49         .irq_set_type   = adm5120_intc_irq_set_type
  50 };
  51
  52 static struct irqaction adm5120_intc_irq_action = {
  53         .handler        = no_action,
  54         .name           = "cascade [INTC]"
  55 };
  56
  57 static void adm5120_intc_irq_unmask(struct irq_data *d)
  58 {
  59         intc_write_reg(INTC_REG_IRQ_ENABLE, 1 << (d->irq - ADM5120_INTC_IRQ_BASE));
  60 }
  61
  62 static void adm5120_intc_irq_mask(struct irq_data *d)
  63 {
  64         intc_write_reg(INTC_REG_IRQ_DISABLE, 1 << (d->irq - ADM5120_INTC_IRQ_BASE));
  65 }
  66
  67 static int adm5120_intc_irq_set_type(struct irq_data *d, unsigned int flow_type)
  68 {
  69         unsigned int irq = d->irq;
  70         unsigned int sense;
  71         unsigned long mode;
  72         int err = 0;
  73
  74         sense = flow_type & (IRQ_TYPE_SENSE_MASK);
  75         switch (sense) {
  76         case IRQ_TYPE_NONE:
  77         case IRQ_TYPE_LEVEL_HIGH:
  78                 break;
  79         case IRQ_TYPE_LEVEL_LOW:
  80                 switch (irq) {
  81                 case ADM5120_IRQ_GPIO2:
  82                 case ADM5120_IRQ_GPIO4:
  83                         break;
  84                 default:
  85                         err = -EINVAL;
  86                         break;
  87                 }
  88                 break;
  89         default:
  90                 err = -EINVAL;
  91                 break;
  92         }
  93
  94         if (err)
  95                 return err;
  96
  97         switch (irq) {
  98         case ADM5120_IRQ_GPIO2:
  99         case ADM5120_IRQ_GPIO4:
 100                 mode = intc_read_reg(INTC_REG_INT_MODE);
 101                 if (sense == IRQ_TYPE_LEVEL_LOW)
 102                         mode |= (1 << (irq - ADM5120_INTC_IRQ_BASE));
 103                 else
 104                         mode &= ~(1 << (irq - ADM5120_INTC_IRQ_BASE));
 105
 106                 intc_write_reg(INTC_REG_INT_MODE, mode);
 107                 break;
 108         }
 109
 110         return 0;
 111 }
 112
 113 static void adm5120_intc_irq_dispatch(void)
 114 {
 115         unsigned long status;
 116         int irq;
 117
 118         status = intc_read_reg(INTC_REG_IRQ_STATUS) & INTC_INT_ALL;
 119         if (status) {
 120                 irq = ADM5120_INTC_IRQ_BASE + fls(status) - 1;
 121                 do_IRQ(irq);
 122         } else
 123                 spurious_interrupt();
 124 }
 125
 126 asmlinkage void plat_irq_dispatch(void)
 127 {
 128         unsigned long pending;
 129
 130         pending = read_c0_status() & read_c0_cause() & ST0_IM;
 131
 132         if (pending & STATUSF_IP7)
 133                 do_IRQ(ADM5120_IRQ_COUNTER);
 134         else if (pending & STATUSF_IP2)
 135                 adm5120_intc_irq_dispatch();
 136         else
 137                 spurious_interrupt();
 138 }
 139
 140 #define INTC_IRQ_STATUS (IRQ_LEVEL | IRQ_TYPE_LEVEL_HIGH | IRQ_DISABLED)
 141 static void __init adm5120_intc_irq_init(void)
 142 {
 143         int i;
 144
 145         /* disable all interrupts */
 146         intc_write_reg(INTC_REG_IRQ_DISABLE, INTC_INT_ALL);
 147
 148         /* setup all interrupts to generate IRQ instead of FIQ */
 149         intc_write_reg(INTC_REG_INT_MODE, 0);
 150
 151         /* set active level for all external interrupts to HIGH */
 152         intc_write_reg(INTC_REG_INT_LEVEL, 0);
 153
 154         /* disable usage of the TEST_SOURCE register */
 155         intc_write_reg(INTC_REG_IRQ_SOURCE_SELECT, 0);
 156
 157         for (i = ADM5120_INTC_IRQ_BASE;
 158                 i <= ADM5120_INTC_IRQ_BASE + INTC_IRQ_LAST;
 159                 i++) {
 160                 irq_set_chip_and_handler(i, &adm5120_intc_irq_chip,
 161                         handle_level_irq);
 162         }
 163
 164         setup_irq(ADM5120_IRQ_INTC, &adm5120_intc_irq_action);
 165 }
 166
 167 void __init arch_init_irq(void)
 168 {
 169         mips_cpu_irq_init();
 170         adm5120_intc_irq_init();
 171 }