target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c25-v1.c

   1 /*
   2  *  TP-Link Archer C25 v1 board support
   3  *
   4  *  Copyright (C) 2017 Ludwig Thomeczek <ledesrc@wxorx.net>
   5  *  based on mach-archer-c60/C59-v1.c
   6  *  Copyright (C) 2016 Henryk Heisig <hyniu@o2.pl>
   7  *
   8  *  This program is free software; you can redistribute it and/or modify it
   9  *  under the terms of the GNU General Public License version 2 as published
  10  *  by the Free Software Foundation.
  11  */
  12 #include <linux/platform_device.h>
  13 #include <linux/ath9k_platform.h>
  14 #include <linux/ar8216_platform.h>
  15 #include <asm/mach-ath79/ar71xx_regs.h>
  16 #include <linux/gpio.h>
  17
  18 #include "common.h"
  19 #include "dev-m25p80.h"
  20 #include "machtypes.h"
  21 #include "pci.h"
  22 #include "dev-ap9x-pci.h"
  23 #include "dev-eth.h"
  24 #include "dev-gpio-buttons.h"
  25 #include "dev-leds-gpio.h"
  26 #include "dev-spi.h"
  27 #include "dev-usb.h"
  28 #include "dev-wmac.h"
  29 #include <linux/spi/spi_gpio.h>
  30 #include <linux/spi/74x164.h>
  31
  32 #define ARCHER_C25_GPIO_SHIFT_OE        21 /* OE,   Output Enable */
  33 #define ARCHER_C25_GPIO_SHIFT_SER       14 /* DS,   Data Serial Input */
  34 #define ARCHER_C25_GPIO_SHIFT_SRCLK     15 /* SHCP, Shift Reg Clock Input */
  35 #define ARCHER_C25_GPIO_SHIFT_SRCLR     19 /* MR,   Master Reset */
  36 #define ARCHER_C25_GPIO_SHIFT_RCLK      16 /* STCP, Storage Reg Clock Input */
  37
  38 #define ARCHER_C25_74HC_GPIO_BASE               QCA956X_GPIO_COUNT
  39 #define ARCHER_C25_74HC_GPIO_LED_WAN_AMBER      27
  40 #define ARCHER_C25_74HC_GPIO_LED_WAN_GREEN      28
  41 #define ARCHER_C25_74HC_GPIO_LED_WLAN2          29
  42 #define ARCHER_C25_74HC_GPIO_LED_WLAN5          30
  43 #define ARCHER_C25_74HC_GPIO_LED_LAN1           23
  44 #define ARCHER_C25_74HC_GPIO_LED_LAN2           24
  45 #define ARCHER_C25_74HC_GPIO_LED_LAN3           25
  46 #define ARCHER_C25_74HC_GPIO_LED_LAN4           26
  47
  48 #define ARCHER_C25_V1_SSR_BIT_0                 0
  49 #define ARCHER_C25_V1_SSR_BIT_1                 1
  50 #define ARCHER_C25_V1_SSR_BIT_2                 2
  51 #define ARCHER_C25_V1_SSR_BIT_3                 3
  52 #define ARCHER_C25_V1_SSR_BIT_4                 4
  53 #define ARCHER_C25_V1_SSR_BIT_5                 5
  54 #define ARCHER_C25_V1_SSR_BIT_6                 6
  55 #define ARCHER_C25_V1_SSR_BIT_7                 7
  56
  57
  58 #define ARCHER_C25_V1_KEYS_POLL_INTERVAL        20
  59 #define ARCHER_C25_V1_KEYS_DEBOUNCE_INTERVAL    \
  60                                         (3 * ARCHER_C25_V1_KEYS_POLL_INTERVAL)
  61
  62 #define ARCHER_C25_V1_GPIO_BTN_RESET            1
  63 #define ARCHER_C25_V1_GPIO_BTN_RFKILL           22
  64
  65 #define ARCHER_C25_V1_GPIO_LED_POWER            17
  66 #define ARCHER_C25_V1_GPIO_LED_WPS              2
  67
  68 #define ARCHER_C25_V1_WMAC_CALDATA_OFFSET       0x1000
  69
  70 static struct spi_gpio_platform_data archer_c25_v1_spi_data = {
  71         .sck            = ARCHER_C25_GPIO_SHIFT_SRCLK,
  72         .miso           = SPI_GPIO_NO_MISO,
  73         .mosi           = ARCHER_C25_GPIO_SHIFT_SER,
  74         .num_chipselect = 1,
  75 };
  76
  77 static u8 archer_c25_v1_ssr_initdata[] = {
  78         BIT(ARCHER_C25_V1_SSR_BIT_7) |
  79         BIT(ARCHER_C25_V1_SSR_BIT_6) |
  80         BIT(ARCHER_C25_V1_SSR_BIT_5) |
  81         BIT(ARCHER_C25_V1_SSR_BIT_4) |
  82         BIT(ARCHER_C25_V1_SSR_BIT_3) |
  83         BIT(ARCHER_C25_V1_SSR_BIT_2) |
  84         BIT(ARCHER_C25_V1_SSR_BIT_1)
  85 };
  86
  87 static struct gen_74x164_chip_platform_data archer_c25_v1_ssr_data = {
  88         .base = ARCHER_C25_74HC_GPIO_BASE,
  89         .num_registers = ARRAY_SIZE(archer_c25_v1_ssr_initdata),
  90         .init_data = archer_c25_v1_ssr_initdata,
  91 };
  92
  93 static struct platform_device archer_c25_v1_spi_device = {
  94         .name           = "spi_gpio",
  95         .id             = 1,
  96         .dev = {
  97                 .platform_data = &archer_c25_v1_spi_data,
  98         },
  99 };
 100
 101 static struct spi_board_info archer_c25_v1_spi_info[] = {
 102         {
 103                 .bus_num                = 1,
 104                 .chip_select            = 0,
 105                 .max_speed_hz           = 10000000,
 106                 .modalias               = "74x164",
 107                 .platform_data          = &archer_c25_v1_ssr_data,
 108                 .controller_data        = (void *) ARCHER_C25_GPIO_SHIFT_RCLK,
 109         },
 110 };
 111
 112 static struct gpio_led archer_c25_v1_leds_gpio[] __initdata = {
 113         {
 114                 .name           = "archer-c25-v1:green:power",
 115                 .gpio           = ARCHER_C25_V1_GPIO_LED_POWER,
 116                 .active_low     = 1,
 117         }, {
 118                 .name           = "archer-c25-v1:green:wps",
 119                 .gpio           = ARCHER_C25_V1_GPIO_LED_WPS,
 120                 .active_low     = 1,
 121         }, {
 122                 .name           = "archer-c25-v1:green:wlan2g",
 123                 .gpio           = ARCHER_C25_74HC_GPIO_LED_WLAN2,
 124                 .active_low     = 1,
 125         }, {
 126                 .name           = "archer-c25-v1:green:wlan5g",
 127                 .gpio           = ARCHER_C25_74HC_GPIO_LED_WLAN5,
 128                 .active_low     = 1,
 129         }, {
 130                 .name           = "archer-c25-v1:green:lan1",
 131                 .gpio           = ARCHER_C25_74HC_GPIO_LED_LAN1,
 132                 .active_low     = 1,
 133         }, {
 134                 .name           = "archer-c25-v1:green:lan2",
 135                 .gpio           = ARCHER_C25_74HC_GPIO_LED_LAN2,
 136                 .active_low     = 1,
 137         }, {
 138                 .name           = "archer-c25-v1:green:lan3",
 139                 .gpio           = ARCHER_C25_74HC_GPIO_LED_LAN3,
 140                 .active_low     = 1,
 141         }, {
 142                 .name           = "archer-c25-v1:green:lan4",
 143                 .gpio           = ARCHER_C25_74HC_GPIO_LED_LAN4,
 144                 .active_low     = 1,
 145         }, {
 146                 .name           = "archer-c25-v1:green:wan",
 147                 .gpio           =  ARCHER_C25_74HC_GPIO_LED_WAN_GREEN,
 148                 .active_low     = 1,
 149         }, {
 150                 .name           = "archer-c25-v1:amber:wan",
 151                 .gpio           =  ARCHER_C25_74HC_GPIO_LED_WAN_AMBER,
 152                 .active_low     = 1,
 153         },
 154 };
 155
 156 static struct gpio_keys_button archer_c25_v1_gpio_keys[] __initdata = {
 157         {
 158                 .desc                   = "Reset button",
 159                 .type                   = EV_KEY,
 160                 .code                   = KEY_RESTART,
 161                 .debounce_interval      = ARCHER_C25_V1_KEYS_DEBOUNCE_INTERVAL,
 162                 .gpio                   = ARCHER_C25_V1_GPIO_BTN_RESET,
 163                 .active_low             = 1,
 164         }, {
 165                 .desc                   = "RFKILL button",
 166                 .type                   = EV_KEY,
 167                 .code                   = KEY_RFKILL,
 168                 .debounce_interval      = ARCHER_C25_V1_KEYS_DEBOUNCE_INTERVAL,
 169                 .gpio                   = ARCHER_C25_V1_GPIO_BTN_RFKILL,
 170                 .active_low             = 1,
 171         },
 172 };
 173
 174 static void __init archer_c25_v1_setup(void)
 175 {
 176         u8 *mac = (u8 *) KSEG1ADDR(0x1f7e0008);
 177         u8 *art = (u8 *) KSEG1ADDR(0x1f7f0000);
 178
 179         ath79_register_m25p80(NULL);
 180
 181         spi_register_board_info(archer_c25_v1_spi_info,
 182                                 ARRAY_SIZE(archer_c25_v1_spi_info));
 183
 184         platform_device_register(&archer_c25_v1_spi_device);
 185
 186         gpio_request_one(ARCHER_C25_GPIO_SHIFT_OE,
 187                          GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
 188                          "LED control");
 189
 190         gpio_request_one(ARCHER_C25_GPIO_SHIFT_SRCLR,
 191                          GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
 192                          "LED reset");
 193
 194         ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c25_v1_leds_gpio),
 195                                  archer_c25_v1_leds_gpio);
 196
 197         ath79_register_gpio_keys_polled(-1, ARCHER_C25_V1_KEYS_POLL_INTERVAL,
 198                                         ARRAY_SIZE(archer_c25_v1_gpio_keys),
 199                                         archer_c25_v1_gpio_keys);
 200
 201         ath79_register_mdio(0, 0x0);
 202         ath79_register_mdio(1, 0x0);
 203
 204         ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
 205         ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1);
 206
 207         /* WAN port */
 208         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
 209         ath79_eth0_data.speed = SPEED_100;
 210         ath79_eth0_data.duplex = DUPLEX_FULL;
 211         ath79_eth0_data.phy_mask = BIT(4);
 212         ath79_register_eth(0);
 213
 214         /* LAN ports */
 215         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
 216         ath79_eth1_data.speed = SPEED_1000;
 217         ath79_eth1_data.duplex = DUPLEX_FULL;
 218         ath79_switch_data.phy_poll_mask |= BIT(4);
 219         ath79_switch_data.phy4_mii_en = 1;
 220         ath79_register_eth(1);
 221
 222         ath79_register_wmac(art + ARCHER_C25_V1_WMAC_CALDATA_OFFSET, mac);
 223         ap91_pci_init(NULL, NULL);
 224 }
 225
 226 MIPS_MACHINE(ATH79_MACH_ARCHER_C25_V1, "ARCHER-C25-V1", "TP-LINK Archer C25 v1",
 227              archer_c25_v1_setup);