ar71xx: add support for COMFAST CF-E320N v2 and CF-E520N/CF-E530N
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-cf-e316n-v2.c
1 /*
2 * Support for COMFAST boards:
3 * - CF-E316N v2 (AR9341)
4 * - CF-E320N v2 (QCA9531)
5 * - CF-E520N/CF-E530N (QCA9531)
6 *
7 * Copyright (C) 2016 Piotr Dymacz <pepe2k@gmail.com>
8 * Copyright (C) 2015 Paul Fertser <fercerpav@gmail.com>
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
13 */
14
15 #include <linux/gpio.h>
16 #include <linux/platform_device.h>
17 #include <linux/timer.h>
18
19 #include <asm/mach-ath79/ath79.h>
20 #include <asm/mach-ath79/ar71xx_regs.h>
21
22 #include "common.h"
23 #include "dev-eth.h"
24 #include "dev-gpio-buttons.h"
25 #include "dev-leds-gpio.h"
26 #include "dev-m25p80.h"
27 #include "dev-wmac.h"
28 #include "dev-usb.h"
29 #include "machtypes.h"
30
31 #define CF_EXXXN_KEYS_POLL_INTERVAL 20
32 #define CF_EXXXN_KEYS_DEBOUNCE_INTERVAL (3 * CF_EXXXN_KEYS_POLL_INTERVAL)
33
34 /* CF-E316N v2 */
35 #define CF_E316N_V2_GPIO_LED_DIAG_B 0
36 #define CF_E316N_V2_GPIO_LED_DIAG_R 2
37 #define CF_E316N_V2_GPIO_LED_DIAG_G 3
38 #define CF_E316N_V2_GPIO_LED_WLAN 12
39 #define CF_E316N_V2_GPIO_LED_WAN 17
40 #define CF_E316N_V2_GPIO_LED_LAN 19
41
42 #define CF_E316N_V2_GPIO_EXT_WDT 16
43
44 #define CF_E316N_V2_GPIO_EXTERNAL_PA0 13
45 #define CF_E316N_V2_GPIO_EXTERNAL_PA1 14
46
47 #define CF_E316N_V2_GPIO_BTN_RESET 20
48
49 static struct gpio_led cf_e316n_v2_leds_gpio[] __initdata = {
50 {
51 .name = "cf-e316n-v2:blue:diag",
52 .gpio = CF_E316N_V2_GPIO_LED_DIAG_B,
53 .active_low = 0,
54 }, {
55 .name = "cf-e316n-v2:red:diag",
56 .gpio = CF_E316N_V2_GPIO_LED_DIAG_R,
57 .active_low = 0,
58 }, {
59 .name = "cf-e316n-v2:green:diag",
60 .gpio = CF_E316N_V2_GPIO_LED_DIAG_G,
61 .active_low = 0,
62 }, {
63 .name = "cf-e316n-v2:blue:wlan",
64 .gpio = CF_E316N_V2_GPIO_LED_WLAN,
65 .active_low = 1,
66 }, {
67 .name = "cf-e316n-v2:blue:wan",
68 .gpio = CF_E316N_V2_GPIO_LED_WAN,
69 .active_low = 1,
70 }, {
71 .name = "cf-e316n-v2:blue:lan",
72 .gpio = CF_E316N_V2_GPIO_LED_LAN,
73 .active_low = 1,
74 },
75 };
76
77 static struct gpio_keys_button cf_e316n_v2_gpio_keys[] __initdata = {
78 {
79 .desc = "reset",
80 .type = EV_KEY,
81 .code = KEY_RESTART,
82 .debounce_interval = CF_EXXXN_KEYS_DEBOUNCE_INTERVAL,
83 .gpio = CF_E316N_V2_GPIO_BTN_RESET,
84 .active_low = 1,
85 },
86 };
87
88 /* CF-E320N v2 */
89 #define CF_E320N_V2_GPIO_LED_WLAN 0
90 #define CF_E320N_V2_GPIO_LED_WAN 2
91 #define CF_E320N_V2_GPIO_LED_LAN 3
92
93 #define CF_E320N_V2_GPIO_HEADER_J9_1 14
94 #define CF_E320N_V2_GPIO_HEADER_J9_2 12
95 #define CF_E320N_V2_GPIO_HEADER_J9_3 11
96 #define CF_E320N_V2_GPIO_HEADER_J9_4 16
97
98 #define CF_E320N_V2_GPIO_EXT_WDT 13
99
100 #define CF_E320N_V2_GPIO_BTN_RESET 17
101
102 static struct gpio_led cf_e320n_v2_leds_gpio[] __initdata = {
103 {
104 .name = "cf-e320n-v2:green:lan",
105 .gpio = CF_E320N_V2_GPIO_LED_LAN,
106 .active_low = 0,
107 }, {
108 .name = "cf-e320n-v2:red:wan",
109 .gpio = CF_E320N_V2_GPIO_LED_WAN,
110 .active_low = 0,
111 }, {
112 .name = "cf-e320n-v2:blue:wlan",
113 .gpio = CF_E320N_V2_GPIO_LED_WLAN,
114 .active_low = 0,
115 },
116 };
117
118 static struct gpio_keys_button cf_e320n_v2_gpio_keys[] __initdata = {
119 {
120 .desc = "Reset button",
121 .type = EV_KEY,
122 .code = KEY_RESTART,
123 .debounce_interval = CF_EXXXN_KEYS_DEBOUNCE_INTERVAL,
124 .gpio = CF_E320N_V2_GPIO_BTN_RESET,
125 .active_low = 1,
126 },
127 };
128
129 /* CF-E520N/CF-E530N */
130 #define CF_E5X0N_GPIO_LED_WAN 11
131 #define CF_E5X0N_GPIO_BTN_RESET 17
132
133 static struct gpio_led cf_e520n_leds_gpio[] __initdata = {
134 {
135 .name = "cf-e520n:blue:wan",
136 .gpio = CF_E5X0N_GPIO_LED_WAN,
137 .active_low = 1,
138 }
139 };
140
141 static struct gpio_led cf_e530n_leds_gpio[] __initdata = {
142 {
143 .name = "cf-e530n:blue:wan",
144 .gpio = CF_E5X0N_GPIO_LED_WAN,
145 .active_low = 1,
146 }
147 };
148
149 /*
150 * Some COMFAST devices include external hardware watchdog chip,
151 * Pericon Technology PT7A7514, connected to a selected GPIO
152 * and WiSoC RESET_L input. Watchdog time-out is ~1.6 s.
153 */
154 #define CF_EXXXN_EXT_WDT_TIMEOUT_MS 500
155
156 static struct timer_list gpio_wdt_timer;
157
158 static void gpio_wdt_toggle(unsigned long gpio)
159 {
160 static int state;
161
162 state = !state;
163 gpio_set_value(gpio, state);
164
165 mod_timer(&gpio_wdt_timer,
166 jiffies + msecs_to_jiffies(CF_EXXXN_EXT_WDT_TIMEOUT_MS));
167 }
168
169 static void __init cf_exxxn_common_setup(int gpio_wdt)
170 {
171 u8 *art = (u8 *) KSEG1ADDR(0x1f011000);
172
173 if (gpio_wdt > -1) {
174 gpio_request_one(gpio_wdt, GPIOF_OUT_INIT_HIGH,
175 "PT7A7514 watchdog");
176
177 setup_timer(&gpio_wdt_timer, gpio_wdt_toggle, gpio_wdt);
178 gpio_wdt_toggle(gpio_wdt);
179 }
180
181 ath79_register_m25p80(NULL);
182
183 ath79_register_wmac(art, NULL);
184
185 ath79_register_usb();
186 }
187
188 static void __init cf_e316n_v2_setup(void)
189 {
190 u8 *mac = (u8 *) KSEG1ADDR(0x1f010000);
191
192 cf_exxxn_common_setup(CF_E316N_V2_GPIO_EXT_WDT);
193
194 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP);
195
196 ath79_register_mdio(1, 0x0);
197
198 /* GMAC0 is connected to the PHY0 of the internal switch */
199 ath79_switch_data.phy4_mii_en = 1;
200 ath79_switch_data.phy_poll_mask = BIT(0);
201 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
202 ath79_eth0_data.phy_mask = BIT(0);
203 ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
204 ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
205 ath79_register_eth(0);
206
207 /* GMAC1 is connected to the internal switch */
208 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
209 ath79_init_mac(ath79_eth1_data.mac_addr, mac, 2);
210 ath79_register_eth(1);
211
212 /* Enable 2x Skyworks SE2576L WLAN power amplifiers */
213 gpio_request_one(CF_E316N_V2_GPIO_EXTERNAL_PA0, GPIOF_OUT_INIT_HIGH,
214 "WLAN PA0");
215 gpio_request_one(CF_E316N_V2_GPIO_EXTERNAL_PA1, GPIOF_OUT_INIT_HIGH,
216 "WLAN PA1");
217
218 ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e316n_v2_leds_gpio),
219 cf_e316n_v2_leds_gpio);
220
221 ath79_register_gpio_keys_polled(1, CF_EXXXN_KEYS_POLL_INTERVAL,
222 ARRAY_SIZE(cf_e316n_v2_gpio_keys),
223 cf_e316n_v2_gpio_keys);
224 }
225
226 MIPS_MACHINE(ATH79_MACH_CF_E316N_V2, "CF-E316N-V2", "COMFAST CF-E316N v2",
227 cf_e316n_v2_setup);
228
229 static void __init cf_exxxn_qca953x_eth_setup(void)
230 {
231 u8 *mac = (u8 *) KSEG1ADDR(0x1f010000);
232
233 ath79_setup_ar933x_phy4_switch(false, false);
234
235 ath79_register_mdio(0, 0x0);
236
237 ath79_switch_data.phy4_mii_en = 1;
238 ath79_switch_data.phy_poll_mask |= BIT(4);
239
240 /* LAN */
241 ath79_eth1_data.duplex = DUPLEX_FULL;
242 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
243 ath79_eth1_data.speed = SPEED_1000;
244 ath79_init_mac(ath79_eth1_data.mac_addr, mac, 2);
245 ath79_register_eth(1);
246
247 /* WAN */
248 ath79_eth0_data.duplex = DUPLEX_FULL;
249 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
250 ath79_eth0_data.speed = SPEED_100;
251 ath79_eth0_data.phy_mask = BIT(4);
252 ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
253 ath79_register_eth(0);
254 }
255
256 static void __init cf_e320n_v2_setup(void)
257 {
258 cf_exxxn_common_setup(CF_E320N_V2_GPIO_EXT_WDT);
259
260 cf_exxxn_qca953x_eth_setup();
261
262 /* Disable JTAG (enables GPIO0-3) */
263 ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
264
265 ath79_gpio_direction_select(CF_E320N_V2_GPIO_LED_LAN, true);
266 ath79_gpio_direction_select(CF_E320N_V2_GPIO_LED_WAN, true);
267 ath79_gpio_direction_select(CF_E320N_V2_GPIO_LED_WLAN, true);
268
269 ath79_gpio_output_select(CF_E320N_V2_GPIO_LED_LAN, 0);
270 ath79_gpio_output_select(CF_E320N_V2_GPIO_LED_WAN, 0);
271 ath79_gpio_output_select(CF_E320N_V2_GPIO_LED_WLAN, 0);
272
273 /* Enable GPIO function for GPIOs in J9 header */
274 ath79_gpio_output_select(CF_E320N_V2_GPIO_HEADER_J9_1, 0);
275 ath79_gpio_output_select(CF_E320N_V2_GPIO_HEADER_J9_2, 0);
276 ath79_gpio_output_select(CF_E320N_V2_GPIO_HEADER_J9_3, 0);
277 ath79_gpio_output_select(CF_E320N_V2_GPIO_HEADER_J9_4, 0);
278
279 ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e320n_v2_leds_gpio),
280 cf_e320n_v2_leds_gpio);
281
282 ath79_register_gpio_keys_polled(-1, CF_EXXXN_KEYS_POLL_INTERVAL,
283 ARRAY_SIZE(cf_e320n_v2_gpio_keys),
284 cf_e320n_v2_gpio_keys);
285 }
286
287 MIPS_MACHINE(ATH79_MACH_CF_E320N_V2, "CF-E320N-V2", "COMFAST CF-E320N v2",
288 cf_e320n_v2_setup);
289
290 static void __init cf_e5x0n_gpio_setup(void)
291 {
292 ath79_gpio_direction_select(CF_E5X0N_GPIO_LED_WAN, true);
293
294 ath79_gpio_output_select(CF_E5X0N_GPIO_LED_WAN, 0);
295
296 ath79_register_gpio_keys_polled(-1, CF_EXXXN_KEYS_POLL_INTERVAL,
297 ARRAY_SIZE(cf_e320n_v2_gpio_keys),
298 cf_e320n_v2_gpio_keys);
299 }
300
301 static void __init cf_e520n_setup(void)
302 {
303 cf_exxxn_common_setup(-1);
304
305 cf_exxxn_qca953x_eth_setup();
306
307 cf_e5x0n_gpio_setup();
308
309 ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e520n_leds_gpio),
310 cf_e520n_leds_gpio);
311 }
312
313 MIPS_MACHINE(ATH79_MACH_CF_E520N, "CF-E520N", "COMFAST CF-E520N",
314 cf_e520n_setup);
315
316 static void __init cf_e530n_setup(void)
317 {
318 cf_exxxn_common_setup(-1);
319
320 cf_exxxn_qca953x_eth_setup();
321
322 cf_e5x0n_gpio_setup();
323
324 ath79_register_leds_gpio(-1, ARRAY_SIZE(cf_e530n_leds_gpio),
325 cf_e530n_leds_gpio);
326 }
327
328 MIPS_MACHINE(ATH79_MACH_CF_E530N, "CF-E530N", "COMFAST CF-E530N",
329 cf_e530n_setup);