ar71xx: add support for MikroTik hAP ac lite
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-cr3000.c
1 /*
2 * PowerCloud Systems CR3000 support
3 *
4 * Copyright (c) 2011 Qualcomm Atheros
5 * Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (c) 2012-2013 PowerCloud Systems
7 * Copyright (c) 2015 Daniel Dickinson <openwrt@daniel.thecshore.com>
8 *
9 * Permission to use, copy, modify, and/or distribute this software for any
10 * purpose with or without fee is hereby granted, provided that the above
11 * copyright notice and this permission notice appear in all copies.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 *
21 */
22
23 #include <linux/gpio.h>
24 #include <linux/pci.h>
25 #include <linux/phy.h>
26 #include <linux/platform_device.h>
27 #include <linux/ath9k_platform.h>
28 #include <linux/ar8216_platform.h>
29
30 #include <asm/mach-ath79/ar71xx_regs.h>
31 #include <asm/mach-ath79/ath79.h>
32
33 #include "common.h"
34 #include "dev-ap9x-pci.h"
35 #include "dev-eth.h"
36 #include "dev-gpio-buttons.h"
37 #include "dev-leds-gpio.h"
38 #include "dev-m25p80.h"
39 #include "dev-spi.h"
40 #include "dev-wmac.h"
41 #include "machtypes.h"
42
43 #define CR3000_GPIO_LED_WLAN_2G 13
44 #define CR3000_GPIO_LED_POWER_AMBER 15
45 #define CR3000_GPIO_LED_WAN 18
46 #define CR3000_GPIO_LED_LAN1 19
47 #define CR3000_GPIO_LED_LAN2 20
48 #define CR3000_GPIO_LED_LAN3 21
49 #define CR3000_GPIO_LED_LAN4 22
50
51 #define CR3000_GPIO_BTN_WPS 16
52 #define CR3000_GPIO_BTN_RESET 17
53
54 #define CR3000_KEYS_POLL_INTERVAL 20 /* msecs */
55 #define CR3000_KEYS_DEBOUNCE_INTERVAL (3 * CR3000_KEYS_POLL_INTERVAL)
56
57 #define CR3000_MAC0_OFFSET 0
58 #define CR3000_MAC1_OFFSET 6
59 #define CR3000_WMAC_CALDATA_OFFSET 0x1000
60 #define CR3000_WMAC_MAC_OFFSET 0x1002
61 #define CR3000_PCIE_CALDATA_OFFSET 0x5000
62
63 static struct gpio_led cr3000_leds_gpio[] __initdata = {
64 {
65 .name = "pcs:amber:power",
66 .gpio = CR3000_GPIO_LED_POWER_AMBER,
67 .active_low = 1,
68 },
69 {
70 .name = "pcs:blue:wlan",
71 .gpio = CR3000_GPIO_LED_WLAN_2G,
72 .active_low = 1,
73 },
74 {
75 .name = "pcs:blue:wan",
76 .gpio = CR3000_GPIO_LED_WAN,
77 .active_low = 1,
78 },
79 {
80 .name = "pcs:blue:lan1",
81 .gpio = CR3000_GPIO_LED_LAN1,
82 .active_low = 1,
83 },
84 {
85 .name = "pcs:blue:lan2",
86 .gpio = CR3000_GPIO_LED_LAN2,
87 .active_low = 1,
88 },
89 {
90 .name = "pcs:blue:lan3",
91 .gpio = CR3000_GPIO_LED_LAN3,
92 .active_low = 1,
93 },
94 {
95 .name = "pcs:blue:lan4",
96 .gpio = CR3000_GPIO_LED_LAN4,
97 .active_low = 1,
98 },
99 };
100
101 static struct gpio_keys_button cr3000_gpio_keys[] __initdata = {
102 {
103 .desc = "WPS button",
104 .type = EV_KEY,
105 .code = KEY_WPS_BUTTON,
106 .debounce_interval = CR3000_KEYS_DEBOUNCE_INTERVAL,
107 .gpio = CR3000_GPIO_BTN_WPS,
108 .active_low = 1,
109 },
110 {
111 .desc = "Reset button",
112 .type = EV_KEY,
113 .code = KEY_WPS_BUTTON,
114 .debounce_interval = CR3000_KEYS_DEBOUNCE_INTERVAL,
115 .gpio = CR3000_GPIO_BTN_RESET,
116 .active_low = 1,
117 },
118 };
119
120 static void __init cr3000_setup(void)
121 {
122 u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
123
124 ath79_register_m25p80(NULL);
125
126 ath79_register_leds_gpio(-1, ARRAY_SIZE(cr3000_leds_gpio),
127 cr3000_leds_gpio);
128
129 ath79_register_gpio_keys_polled(-1, CR3000_KEYS_POLL_INTERVAL,
130 ARRAY_SIZE(cr3000_gpio_keys),
131 cr3000_gpio_keys);
132
133 /* WLAN 2GHz onboard */
134 ath79_register_wmac(art + CR3000_WMAC_CALDATA_OFFSET, art + CR3000_WMAC_MAC_OFFSET);
135
136 ath79_register_mdio(1, 0x0);
137 ath79_register_mdio(0, 0x0);
138
139 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP);
140
141 /* Lan 4-port switch attached to GMAC1 internal switch */
142 ath79_init_mac(ath79_eth1_data.mac_addr, art + CR3000_MAC0_OFFSET, 0);
143
144 ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
145 ath79_eth1_data.speed = SPEED_1000;
146 ath79_eth1_data.duplex = DUPLEX_FULL;
147 ath79_register_eth(1);
148
149 ath79_init_mac(ath79_eth0_data.mac_addr, art + CR3000_MAC1_OFFSET, 0);
150
151 /* WAN Fast Ethernet interface attached to GMAC0 */
152 ath79_switch_data.phy4_mii_en = 1;
153 ath79_switch_data.phy_poll_mask = BIT(0);
154 ath79_eth0_data.phy_mask = BIT(0);
155 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
156 ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
157 ath79_register_eth(0);
158 }
159
160 MIPS_MACHINE(ATH79_MACH_CR3000, "CR3000", "PowerCloud CR3000",
161 cr3000_setup);