wireguard-tools: add tunlink option for hostroute
[openwrt/openwrt.git] / target / linux / ar71xx / files / arch / mips / ath79 / mach-hiveap-121.c
1 /*
2 * Aerohive HiveAP 121 board support
3 *
4 * Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation.
9 */
10 #include <linux/gpio.h>
11 #include <linux/i2c.h>
12 #include <linux/i2c-gpio.h>
13 #include <linux/platform_device.h>
14 #include <linux/ath9k_platform.h>
15 #include <linux/platform/ar934x_nfc.h>
16 #include <asm/mach-ath79/ath79.h>
17 #include <asm/mach-ath79/ar71xx_regs.h>
18
19 #include "common.h"
20 #include "dev-eth.h"
21 #include "dev-gpio-buttons.h"
22 #include "dev-leds-gpio.h"
23 #include "dev-nfc.h"
24 #include "dev-usb.h"
25 #include "dev-wmac.h"
26 #include "dev-ap9x-pci.h"
27 #include "dev-m25p80.h"
28 #include "machtypes.h"
29
30 #define HIVEAP_121_GPIO_LED_ORANGE 14
31 #define HIVEAP_121_GPIO_LED_WHITE 21
32 #define HIVEAP_121_GPIO_I2C_SCL 12
33 #define HIVEAP_121_GPIO_I2C_SDA 13
34 #define HIVEAP_121_GPIO_XLNA0 20
35 #define HIVEAP_121_GPIO_XLNA1 19
36 #define HIVEAP_121_GPIO_USB_POWER 15
37
38 #define HIVEAP_121_GPIO_BTN_RESET 4
39 #define HIVEAP_121_KEYS_POLL_INTERVAL 20 /* msecs */
40 #define HIVEAP_121_KEYS_DEBOUNCE_INTERVAL \
41 (3 * HIVEAP_121_KEYS_POLL_INTERVAL)
42
43 #define HIVEAP_121_MAC_OFFSET 0x90000
44
45 #define HIVEAP_121_LAN_PHYADDR 0
46
47 static struct gpio_led hiveap_121_leds_gpio[] __initdata = {
48 {
49 .name = "hiveap-121:orange:power",
50 .gpio = HIVEAP_121_GPIO_LED_ORANGE,
51 .active_low = 1,
52 }, {
53 .name = "hiveap-121:white:power",
54 .gpio = HIVEAP_121_GPIO_LED_WHITE,
55 .active_low = 1,
56 }
57 };
58
59 static struct gpio_keys_button hiveap_121_gpio_keys[] __initdata = {
60 {
61 .desc = "reset",
62 .type = EV_KEY,
63 .code = KEY_RESTART,
64 .debounce_interval = HIVEAP_121_KEYS_DEBOUNCE_INTERVAL,
65 .gpio = HIVEAP_121_GPIO_BTN_RESET,
66 .active_low = 1,
67 },
68 };
69
70 static struct i2c_gpio_platform_data hiveap_121_i2c_gpio_data = {
71 .sda_pin = HIVEAP_121_GPIO_I2C_SDA,
72 .scl_pin = HIVEAP_121_GPIO_I2C_SCL,
73 };
74
75 static struct platform_device hiveap_121_i2c_gpio_device = {
76 .name = "i2c-gpio",
77 .id = 0,
78 .dev = {
79 .platform_data = &hiveap_121_i2c_gpio_data,
80 }
81 };
82
83 static struct i2c_board_info tpm_i2c_info[] __initdata = {
84 {
85 I2C_BOARD_INFO("tpm_i2c_atmel", 0x29),
86 }
87 };
88
89 static void __init hiveap_121_setup(void)
90 {
91 u8 *base = (u8 *) KSEG1ADDR(0x1f000000);
92 u8 wlan0_mac[ETH_ALEN];
93 u8 wlan1_mac[ETH_ALEN];
94
95 /* NAND */
96 ath79_nfc_set_ecc_mode(AR934X_NFC_ECC_HW);
97 ath79_register_nfc();
98
99 /* SPI */
100 ath79_register_m25p80(NULL);
101
102 /* MDIO Interface */
103 ath79_register_mdio(0, 0x0);
104 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
105 AR934X_ETH_CFG_RXD_DELAY |
106 AR934X_ETH_CFG_RDV_DELAY);
107
108 /* GMAC0 is connected to the RGMII interface to an Atheros AR8035-A */
109 ath79_init_mac(ath79_eth0_data.mac_addr,
110 base + HIVEAP_121_MAC_OFFSET, 0);
111 ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
112 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
113 ath79_eth0_data.phy_mask = BIT(HIVEAP_121_LAN_PHYADDR);
114 ath79_eth0_pll_data.pll_1000 = 0x06000000;
115 ath79_eth0_pll_data.pll_100 = 0x00000101;
116 ath79_eth0_pll_data.pll_10 = 0x00001313;
117 ath79_register_eth(0);
118
119 /* i2c */
120 ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
121 platform_device_register(&hiveap_121_i2c_gpio_device);
122
123 /* TPM */
124 i2c_register_board_info(0, tpm_i2c_info, ARRAY_SIZE(tpm_i2c_info));
125
126 /* LEDs and Buttons */
127 ath79_register_leds_gpio(-1, ARRAY_SIZE(hiveap_121_leds_gpio),
128 hiveap_121_leds_gpio);
129 ath79_register_gpio_keys_polled(-1, HIVEAP_121_KEYS_POLL_INTERVAL,
130 ARRAY_SIZE(hiveap_121_gpio_keys),
131 hiveap_121_gpio_keys);
132
133 /* USB */
134 gpio_request_one(HIVEAP_121_GPIO_USB_POWER,
135 GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
136 "USB power");
137 ath79_register_usb();
138
139 /* XLNA - SoC Wireless */
140 ath79_wmac_set_ext_lna_gpio(0, HIVEAP_121_GPIO_XLNA0);
141 ath79_wmac_set_ext_lna_gpio(1, HIVEAP_121_GPIO_XLNA1);
142
143 /* SoC Wireless */
144 ath79_init_mac(wlan0_mac, base + HIVEAP_121_MAC_OFFSET, 1);
145 ath79_register_wmac(NULL, wlan0_mac); /* Caldata in OTP */
146
147 /* PCIe Wireless */
148 ath79_init_mac(wlan1_mac, base + HIVEAP_121_MAC_OFFSET, 2);
149 ap91_pci_init(NULL, wlan1_mac); /* Caldata in OTP */
150 }
151
152 MIPS_MACHINE(ATH79_MACH_HIVEAP_121, "HiveAP-121", "Aerohive HiveAP-121",
153 hiveap_121_setup);