2 * WD My Net N750 board support
4 * Copyright (C) 2013 Felix Kaechele <felix@fetzig.org>
5 * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
12 #include <linux/pci.h>
13 #include <linux/phy.h>
14 #include <linux/gpio.h>
15 #include <linux/delay.h>
16 #include <linux/platform_device.h>
17 #include <linux/ath9k_platform.h>
18 #include <linux/ar8216_platform.h>
20 #include <asm/mach-ath79/ar71xx_regs.h>
23 #include "dev-ap9x-pci.h"
25 #include "dev-gpio-buttons.h"
26 #include "dev-leds-gpio.h"
27 #include "dev-m25p80.h"
31 #include "machtypes.h"
36 * Taken from GPL bootloader source:
37 * board/ar7240/db12x/alpha_gpio.c
39 #define MYNET_N750_GPIO_LED_WIFI 11
40 #define MYNET_N750_GPIO_LED_INTERNET 12
41 #define MYNET_N750_GPIO_LED_WPS 13
42 #define MYNET_N750_GPIO_LED_POWER 14
44 #define MYNET_N750_GPIO_BTN_RESET 17
45 #define MYNET_N750_GPIO_BTN_WPS 19
47 #define MYNET_N750_GPIO_EXTERNAL_LNA0 15
48 #define MYNET_N750_GPIO_EXTERNAL_LNA1 18
50 #define MYNET_N750_KEYS_POLL_INTERVAL 20 /* msecs */
51 #define MYNET_N750_KEYS_DEBOUNCE_INTERVAL (3 * MYNET_N750_KEYS_POLL_INTERVAL)
53 #define MYNET_N750_WMAC_CALDATA_OFFSET 0x1000
54 #define MYNET_N750_PCIE_CALDATA_OFFSET 0x5000
56 #define MYNET_N750_NVRAM_ADDR 0x1f058010
57 #define MYNET_N750_NVRAM_SIZE 0x7ff0
59 static struct gpio_led mynet_n750_leds_gpio
[] __initdata
= {
61 .name
= "wd:blue:power",
62 .gpio
= MYNET_N750_GPIO_LED_POWER
,
66 .name
= "wd:blue:wps",
67 .gpio
= MYNET_N750_GPIO_LED_WPS
,
71 .name
= "wd:blue:wireless",
72 .gpio
= MYNET_N750_GPIO_LED_WIFI
,
76 .name
= "wd:blue:internet",
77 .gpio
= MYNET_N750_GPIO_LED_INTERNET
,
82 static struct gpio_keys_button mynet_n750_gpio_keys
[] __initdata
= {
84 .desc
= "Reset button",
87 .debounce_interval
= MYNET_N750_KEYS_DEBOUNCE_INTERVAL
,
88 .gpio
= MYNET_N750_GPIO_BTN_RESET
,
94 .code
= KEY_WPS_BUTTON
,
95 .debounce_interval
= MYNET_N750_KEYS_DEBOUNCE_INTERVAL
,
96 .gpio
= MYNET_N750_GPIO_BTN_WPS
,
101 static struct ar8327_pad_cfg mynet_n750_ar8327_pad0_cfg
= {
102 .mode
= AR8327_PAD_MAC_RGMII
,
103 .txclk_delay_en
= true,
104 .rxclk_delay_en
= true,
105 .txclk_delay_sel
= AR8327_CLK_DELAY_SEL1
,
106 .rxclk_delay_sel
= AR8327_CLK_DELAY_SEL2
,
109 static struct ar8327_led_cfg mynet_n750_ar8327_led_cfg
= {
110 .led_ctrl0
= 0xc737c737,
111 .led_ctrl1
= 0x00000000,
112 .led_ctrl2
= 0x00000000,
113 .led_ctrl3
= 0x0030c300,
117 static struct ar8327_platform_data mynet_n750_ar8327_data
= {
118 .pad0_cfg
= &mynet_n750_ar8327_pad0_cfg
,
121 .speed
= AR8327_PORT_SPEED_1000
,
126 .led_cfg
= &mynet_n750_ar8327_led_cfg
,
129 static struct mdio_board_info mynet_n750_mdio0_info
[] = {
131 .bus_id
= "ag71xx-mdio.0",
133 .platform_data
= &mynet_n750_ar8327_data
,
137 static void mynet_n750_get_mac(const char *name
, char *mac
)
139 u8
*nvram
= (u8
*) KSEG1ADDR(MYNET_N750_NVRAM_ADDR
);
142 err
= ath79_nvram_parse_mac_addr(nvram
, MYNET_N750_NVRAM_SIZE
,
145 pr_err("no MAC address found for %s\n", name
);
149 * The bootloader on this board powers down all PHYs on the switch
150 * before booting the kernel. We bring all PHYs back up so that they are
151 * discoverable by the mdio bus scan and the switch is detected
154 static void mynet_n750_mdio_fixup(struct mii_bus
*bus
)
158 for (i
= 0; i
< 5; i
++)
159 bus
->write(bus
, i
, MII_BMCR
,
160 (BMCR_RESET
| BMCR_ANENABLE
| BMCR_SPEED1000
));
165 static void __init
mynet_n750_setup(void)
167 u8
*art
= (u8
*) KSEG1ADDR(0x1fff0000);
170 ath79_register_m25p80(NULL
);
171 ath79_register_leds_gpio(-1, ARRAY_SIZE(mynet_n750_leds_gpio
),
172 mynet_n750_leds_gpio
);
173 ath79_register_gpio_keys_polled(-1, MYNET_N750_KEYS_POLL_INTERVAL
,
174 ARRAY_SIZE(mynet_n750_gpio_keys
),
175 mynet_n750_gpio_keys
);
177 * Control signal for external LNAs 0 and 1
178 * Taken from GPL bootloader source:
179 * board/ar7240/db12x/alpha_gpio.c
181 gpio_request_one(MYNET_N750_GPIO_EXTERNAL_LNA0
,
182 GPIOF_OUT_INIT_LOW
| GPIOF_EXPORT_DIR_FIXED
,
184 gpio_request_one(MYNET_N750_GPIO_EXTERNAL_LNA1
,
185 GPIOF_OUT_INIT_LOW
| GPIOF_EXPORT_DIR_FIXED
,
188 mynet_n750_get_mac("wlan24mac=", tmpmac
);
189 ath79_register_wmac(art
+ MYNET_N750_WMAC_CALDATA_OFFSET
, tmpmac
);
191 mynet_n750_get_mac("wlan5mac=", tmpmac
);
192 ap91_pci_init(art
+ MYNET_N750_PCIE_CALDATA_OFFSET
, tmpmac
);
194 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0
);
196 mdiobus_register_board_info(mynet_n750_mdio0_info
,
197 ARRAY_SIZE(mynet_n750_mdio0_info
));
199 ath79_mdio0_data
.reset
= mynet_n750_mdio_fixup
;
200 ath79_register_mdio(0, 0x0);
202 mynet_n750_get_mac("lanmac=", ath79_eth0_data
.mac_addr
);
204 /* GMAC0 is connected to an AR8327N switch */
205 ath79_eth0_data
.phy_if_mode
= PHY_INTERFACE_MODE_RGMII
;
206 ath79_eth0_data
.phy_mask
= BIT(0);
207 ath79_eth0_data
.mii_bus_dev
= &ath79_mdio0_device
.dev
;
208 ath79_eth0_pll_data
.pll_1000
= 0x06000000;
209 ath79_register_eth(0);
211 ath79_register_usb();
214 MIPS_MACHINE(ATH79_MACH_MYNET_N750
, "MYNET-N750", "WD My Net N750",