target/linux/ar71xx/files/arch/mips/ath79/mach-om5p.c

   1 /*
   2  *  OpenMesh OM5P support
   3  *
   4  *  Copyright (C) 2013 Marek Lindner <marek@open-mesh.com>
   5  *  Copyright (C) 2014 Sven Eckelmann <sven@open-mesh.com>
   6  *
   7  *  This program is free software; you can redistribute it and/or modify it
   8  *  under the terms of the GNU General Public License version 2 as published
   9  *  by the Free Software Foundation.
  10  */
  11
  12 #include <linux/gpio.h>
  13 #include <linux/mtd/mtd.h>
  14 #include <linux/mtd/partitions.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/i2c.h>
  17 #include <linux/i2c-algo-bit.h>
  18 #include <linux/i2c-gpio.h>
  19
  20 #include <asm/mach-ath79/ar71xx_regs.h>
  21 #include <asm/mach-ath79/ath79.h>
  22
  23 #include "common.h"
  24 #include "dev-ap9x-pci.h"
  25 #include "dev-eth.h"
  26 #include "dev-gpio-buttons.h"
  27 #include "dev-leds-gpio.h"
  28 #include "dev-m25p80.h"
  29 #include "dev-wmac.h"
  30 #include "machtypes.h"
  31
  32 #define OM5P_GPIO_LED_POWER     13
  33 #define OM5P_GPIO_LED_GREEN     16
  34 #define OM5P_GPIO_LED_RED       19
  35 #define OM5P_GPIO_LED_YELLOW    17
  36 #define OM5P_GPIO_LED_LAN       14
  37 #define OM5P_GPIO_LED_WAN       15
  38 #define OM5P_GPIO_BTN_RESET     4
  39 #define OM5P_GPIO_I2C_SCL       20
  40 #define OM5P_GPIO_I2C_SDA       21
  41
  42 #define OM5P_KEYS_POLL_INTERVAL         20      /* msecs */
  43 #define OM5P_KEYS_DEBOUNCE_INTERVAL     (3 * OM5P_KEYS_POLL_INTERVAL)
  44
  45 #define OM5P_WMAC_CALDATA_OFFSET        0x1000
  46 #define OM5P_PCI_CALDATA_OFFSET         0x5000
  47
  48 static struct gpio_led om5p_leds_gpio[] __initdata = {
  49         {
  50                 .name           = "om5p:blue:power",
  51                 .gpio           = OM5P_GPIO_LED_POWER,
  52                 .active_low     = 1,
  53         }, {
  54                 .name           = "om5p:red:wifi",
  55                 .gpio           = OM5P_GPIO_LED_RED,
  56                 .active_low     = 1,
  57         }, {
  58                 .name           = "om5p:yellow:wifi",
  59                 .gpio           = OM5P_GPIO_LED_YELLOW,
  60                 .active_low     = 1,
  61         }, {
  62                 .name           = "om5p:green:wifi",
  63                 .gpio           = OM5P_GPIO_LED_GREEN,
  64                 .active_low     = 1,
  65         }, {
  66                 .name           = "om5p:blue:lan",
  67                 .gpio           = OM5P_GPIO_LED_LAN,
  68                 .active_low     = 1,
  69         }, {
  70                 .name           = "om5p:blue:wan",
  71                 .gpio           = OM5P_GPIO_LED_WAN,
  72                 .active_low     = 1,
  73         }
  74 };
  75
  76 static struct gpio_keys_button om5p_gpio_keys[] __initdata = {
  77         {
  78                 .desc           = "reset",
  79                 .type           = EV_KEY,
  80                 .code           = KEY_RESTART,
  81                 .debounce_interval = OM5P_KEYS_DEBOUNCE_INTERVAL,
  82                 .gpio           = OM5P_GPIO_BTN_RESET,
  83                 .active_low     = 1,
  84         }
  85 };
  86
  87 static struct flash_platform_data om5p_flash_data = {
  88         .type = "mx25l12805d",
  89 };
  90
  91 static void __init om5p_setup(void)
  92 {
  93         u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
  94         u8 mac[6];
  95
  96         /* make lan / wan leds software controllable */
  97         ath79_gpio_output_select(OM5P_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO);
  98         ath79_gpio_output_select(OM5P_GPIO_LED_WAN, AR934X_GPIO_OUT_GPIO);
  99
 100         ath79_register_m25p80(&om5p_flash_data);
 101         ath79_register_leds_gpio(-1, ARRAY_SIZE(om5p_leds_gpio),
 102                                  om5p_leds_gpio);
 103         ath79_register_gpio_keys_polled(-1, OM5P_KEYS_POLL_INTERVAL,
 104                                         ARRAY_SIZE(om5p_gpio_keys),
 105                                         om5p_gpio_keys);
 106
 107         ath79_init_mac(mac, art, 2);
 108         ath79_register_wmac(art + OM5P_WMAC_CALDATA_OFFSET, mac);
 109
 110         ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_SW_PHY_SWAP);
 111         ath79_register_mdio(1, 0x0);
 112
 113         ath79_init_mac(ath79_eth0_data.mac_addr, art, 0);
 114         ath79_init_mac(ath79_eth1_data.mac_addr, art, 1);
 115
 116         /* GMAC0 is connected to the PHY0 of the internal switch */
 117         ath79_switch_data.phy4_mii_en = 1;
 118         ath79_switch_data.phy_poll_mask = BIT(0);
 119         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
 120         ath79_eth0_data.phy_mask = BIT(0);
 121         ath79_eth0_data.mii_bus_dev = &ath79_mdio1_device.dev;
 122         ath79_register_eth(0);
 123
 124         /* GMAC1 is connected to the internal switch */
 125         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
 126         ath79_register_eth(1);
 127 }
 128
 129 MIPS_MACHINE(ATH79_MACH_OM5P, "OM5P", "OpenMesh OM5P", om5p_setup);
 130
 131 static struct i2c_gpio_platform_data om5pan_i2c_device_platdata = {
 132         .sda_pin                = OM5P_GPIO_I2C_SDA,
 133         .scl_pin                = OM5P_GPIO_I2C_SCL,
 134         .udelay                 = 10,
 135         .sda_is_open_drain      = 1,
 136         .scl_is_open_drain      = 1,
 137 };
 138
 139 static struct platform_device om5pan_i2c_device = {
 140         .name           = "i2c-gpio",
 141         .id             = 0,
 142         .dev            = {
 143                 .platform_data  = &om5pan_i2c_device_platdata,
 144         },
 145 };
 146
 147 static struct i2c_board_info om5pan_i2c_devs[] __initdata = {
 148         {
 149                 I2C_BOARD_INFO("tmp423", 0x4c),
 150         },
 151 };
 152
 153 static void __init om5p_an_setup(void)
 154 {
 155         u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
 156         u8 mac[6];
 157
 158         /* temperature sensor */
 159         platform_device_register(&om5pan_i2c_device);
 160         i2c_register_board_info(0, om5pan_i2c_devs,
 161                                 ARRAY_SIZE(om5pan_i2c_devs));
 162
 163         /* make lan / wan leds software controllable */
 164         ath79_gpio_output_select(OM5P_GPIO_LED_LAN, AR934X_GPIO_OUT_GPIO);
 165         ath79_gpio_output_select(OM5P_GPIO_LED_WAN, AR934X_GPIO_OUT_GPIO);
 166
 167         ath79_register_m25p80(&om5p_flash_data);
 168         ath79_register_leds_gpio(-1, ARRAY_SIZE(om5p_leds_gpio),
 169                                  om5p_leds_gpio);
 170
 171         ath79_init_mac(mac, art, 0x02);
 172         ath79_register_wmac(art + OM5P_WMAC_CALDATA_OFFSET, mac);
 173
 174         ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
 175         ath79_register_mdio(0, 0x0);
 176         ath79_register_mdio(1, 0x0);
 177
 178         ath79_init_mac(ath79_eth0_data.mac_addr, art, 0x00);
 179         ath79_init_mac(ath79_eth1_data.mac_addr, art, 0x01);
 180
 181         /* GMAC0 is connected to the PHY7 */
 182         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 183         ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
 184         ath79_eth0_data.phy_mask = BIT(7);
 185         ath79_eth0_pll_data.pll_1000 = 0x1a000000;
 186         ath79_eth0_pll_data.pll_100 = 0x00000101;
 187         ath79_eth0_pll_data.pll_10 = 0x00001313;
 188         ath79_register_eth(0);
 189
 190         /* GMAC1 is connected to the internal switch */
 191         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_GMII;
 192         ath79_eth1_data.mii_bus_dev = &ath79_mdio1_device.dev;
 193         ath79_register_eth(1);
 194
 195         ath79_init_mac(mac, art, 0x10);
 196         ap91_pci_init(art + OM5P_PCI_CALDATA_OFFSET, mac);
 197 }
 198
 199 MIPS_MACHINE(ATH79_MACH_OM5P_AN, "OM5P-AN", "OpenMesh OM5P AN", om5p_an_setup);