target/linux/ar71xx/files/arch/mips/ath79/mach-sr3200.c

   1 /*
   2  * Support for YunCore SR3200 and XD3200 boards
   3  *
   4  * Copyright (C) 2016 Piotr Dymacz <pepe2k@gmail.com>
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 as published
   8  * by the Free Software Foundation.
   9  */
  10
  11 #include <linux/phy.h>
  12 #include <linux/gpio.h>
  13 #include <linux/ar8216_platform.h>
  14 #include <linux/platform_device.h>
  15
  16 #include <asm/mach-ath79/ath79.h>
  17 #include <asm/mach-ath79/ar71xx_regs.h>
  18
  19 #include "common.h"
  20 #include "dev-ap9x-pci.h"
  21 #include "dev-eth.h"
  22 #include "dev-gpio-buttons.h"
  23 #include "dev-leds-gpio.h"
  24 #include "dev-m25p80.h"
  25 #include "dev-usb.h"
  26 #include "dev-wmac.h"
  27 #include "machtypes.h"
  28
  29 #define SR3200_XD3200_GPIO_LED_SYSTEM   1
  30 #define SR3200_XD3200_GPIO_LED_WLAN2G   19
  31
  32 #define SR3200_XD3200_GPIO_BTN_RESET    2
  33
  34 #define SR3200_XD3200_KEYS_POLL_INTERVAL        20
  35 #define SR3200_XD3200_KEYS_DEBOUNCE_INTERVAL    \
  36                 (3 * SR3200_XD3200_KEYS_POLL_INTERVAL)
  37
  38 static struct gpio_led xd3200_leds_gpio[] __initdata = {
  39         {
  40                 .name           = "xd3200:green:system",
  41                 .gpio           = SR3200_XD3200_GPIO_LED_SYSTEM,
  42                 .active_low     = 1,
  43         },
  44         {
  45                 .name           = "xd3200:blue:wlan2g",
  46                 .gpio           = SR3200_XD3200_GPIO_LED_WLAN2G,
  47                 .active_low     = 1,
  48         },
  49 };
  50
  51 static struct gpio_led sr3200_leds_gpio[] __initdata = {
  52         {
  53                 .name           = "sr3200:green:system",
  54                 .gpio           = SR3200_XD3200_GPIO_LED_SYSTEM,
  55                 .active_low     = 1,
  56         },
  57         {
  58                 .name           = "sr3200:green:wlan2g",
  59                 .gpio           = SR3200_XD3200_GPIO_LED_WLAN2G,
  60                 .active_low     = 1,
  61         },
  62 };
  63
  64 static struct gpio_keys_button sr3200_xd3200_gpio_keys[] __initdata = {
  65         {
  66                 .desc           = "reset",
  67                 .type           = EV_KEY,
  68                 .code           = KEY_RESTART,
  69                 .debounce_interval = SR3200_XD3200_KEYS_DEBOUNCE_INTERVAL,
  70                 .gpio           = SR3200_XD3200_GPIO_BTN_RESET,
  71                 .active_low     = 1,
  72         },
  73 };
  74
  75 static const struct ar8327_led_info sr3200_leds_qca833x[] = {
  76         AR8327_LED_INFO(PHY0_0, HW, "sr3200:green:lan1"),
  77         AR8327_LED_INFO(PHY1_0, HW, "sr3200:green:lan2"),
  78         AR8327_LED_INFO(PHY2_0, HW, "sr3200:green:lan3"),
  79         AR8327_LED_INFO(PHY3_0, HW, "sr3200:green:lan4"),
  80         AR8327_LED_INFO(PHY4_0, HW, "sr3200:green:wan"),
  81 };
  82
  83 static const struct ar8327_led_info xd3200_leds_qca833x[] = {
  84         AR8327_LED_INFO(PHY1_0, HW, "xd3200:green:lan"),
  85         AR8327_LED_INFO(PHY2_0, HW, "xd3200:green:wan"),
  86 };
  87
  88 /* Blink rate: 1 Gbps -> 8 hz, 100 Mbs -> 4 Hz, 10 Mbps -> 2 Hz */
  89 static struct ar8327_led_cfg sr3200_xd3200_qca833x_led_cfg = {
  90         .led_ctrl0 = 0xcf37cf37,
  91         .led_ctrl1 = 0xcf37cf37,
  92         .led_ctrl2 = 0xcf37cf37,
  93         .led_ctrl3 = 0x0,
  94         .open_drain = true,
  95 };
  96
  97 static struct ar8327_pad_cfg sr3200_xd3200_qca833x_pad0_cfg = {
  98         .mode = AR8327_PAD_MAC_SGMII,
  99         .sgmii_delay_en = true,
 100 };
 101
 102 static struct ar8327_platform_data sr3200_xd3200_qca833x_data = {
 103         .pad0_cfg = &sr3200_xd3200_qca833x_pad0_cfg,
 104         .port0_cfg = {
 105                 .force_link = 1,
 106                 .speed = AR8327_PORT_SPEED_1000,
 107                 .duplex = 1,
 108                 .txpause = 1,
 109                 .rxpause = 1,
 110         },
 111         .led_cfg = &sr3200_xd3200_qca833x_led_cfg,
 112 };
 113
 114 static struct mdio_board_info sr3200_xd3200_mdio0_info[] = {
 115         {
 116                 .bus_id = "ag71xx-mdio.0",
 117                 .mdio_addr = 0,
 118                 .platform_data = &sr3200_xd3200_qca833x_data,
 119         },
 120 };
 121
 122 static void __init sr3200_xd3200_common_setup(void)
 123 {
 124         u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000);
 125
 126         ath79_register_m25p80(NULL);
 127
 128         ath79_register_mdio(0, 0x0);
 129         mdiobus_register_board_info(sr3200_xd3200_mdio0_info,
 130                                     ARRAY_SIZE(sr3200_xd3200_mdio0_info));
 131
 132         /* GMAC0 is connected to QCA8334/QCA8337N switch */
 133         ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
 134         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
 135         ath79_eth0_data.phy_mask = BIT(0);
 136         ath79_eth0_data.speed = SPEED_1000;
 137         ath79_eth0_data.duplex = DUPLEX_FULL;
 138
 139         ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
 140         ath79_register_eth(0);
 141
 142         ath79_register_wmac(mac + 0x1000, NULL);
 143
 144         ap91_pci_init(mac + 0x5000, NULL);
 145
 146         ath79_gpio_direction_select(SR3200_XD3200_GPIO_LED_SYSTEM, true);
 147         ath79_gpio_direction_select(SR3200_XD3200_GPIO_LED_WLAN2G, true);
 148
 149         /* Mute LEDs on boot */
 150         gpio_set_value(SR3200_XD3200_GPIO_LED_SYSTEM, 1);
 151         gpio_set_value(SR3200_XD3200_GPIO_LED_WLAN2G, 1);
 152
 153         ath79_gpio_output_select(SR3200_XD3200_GPIO_LED_SYSTEM, 0);
 154         ath79_gpio_output_select(SR3200_XD3200_GPIO_LED_WLAN2G, 0);
 155
 156         ath79_register_gpio_keys_polled(-1, SR3200_XD3200_KEYS_POLL_INTERVAL,
 157                                         ARRAY_SIZE(sr3200_xd3200_gpio_keys),
 158                                         sr3200_xd3200_gpio_keys);
 159 }
 160
 161 static void __init sr3200_setup(void)
 162 {
 163         sr3200_xd3200_qca833x_data.leds = sr3200_leds_qca833x;
 164         sr3200_xd3200_qca833x_data.num_leds = ARRAY_SIZE(sr3200_leds_qca833x);
 165
 166         sr3200_xd3200_common_setup();
 167
 168         ath79_register_leds_gpio(-1, ARRAY_SIZE(sr3200_leds_gpio),
 169                                  sr3200_leds_gpio);
 170
 171         ath79_register_usb();
 172 }
 173
 174 MIPS_MACHINE(ATH79_MACH_SR3200, "SR3200", "YunCore SR3200", sr3200_setup);
 175
 176 static void __init xd3200_setup(void)
 177 {
 178         sr3200_xd3200_qca833x_data.leds = xd3200_leds_qca833x;
 179         sr3200_xd3200_qca833x_data.num_leds = ARRAY_SIZE(xd3200_leds_qca833x);
 180
 181         sr3200_xd3200_common_setup();
 182
 183         ath79_register_leds_gpio(-1, ARRAY_SIZE(xd3200_leds_gpio),
 184                                  xd3200_leds_gpio);
 185 }
 186
 187 MIPS_MACHINE(ATH79_MACH_XD3200, "XD3200", "YunCore XD3200", xd3200_setup);