add try partition parser for the WRT160NL board (thanks to Christian Daniel and Gerry...
[openwrt/openwrt.git] / target / linux / ar71xx / patches-2.6.28 / 109-mtd-wrt160nl-trx-parser.patch
1 diff -ur linux-2.6.28.10-orig/drivers/mtd/devices/m25p80.c linux-2.6.28.10/drivers/mtd/devices/m25p80.c
2 --- linux-2.6.28.10-orig/drivers/mtd/devices/m25p80.c 2009-07-19 10:36:42.000000000 +0200
3 +++ linux-2.6.28.10/drivers/mtd/devices/m25p80.c 2009-07-22 21:49:21.204685685 +0200
4 @@ -735,6 +735,9 @@
5 #ifdef CONFIG_MTD_REDBOOT_PARTS
6 "RedBoot",
7 #endif
8 +#ifdef CONFIG_MTD_TRX_PARTS
9 + "trxpart",
10 +#endif
11 NULL, };
12
13 nr_parts = parse_mtd_partitions(&flash->mtd,
14 diff -ur linux-2.6.28.10-orig/drivers/mtd/Kconfig linux-2.6.28.10/drivers/mtd/Kconfig
15 --- linux-2.6.28.10-orig/drivers/mtd/Kconfig 2009-07-19 10:36:39.000000000 +0200
16 +++ linux-2.6.28.10/drivers/mtd/Kconfig 2009-07-22 21:20:42.929604980 +0200
17 @@ -172,6 +172,12 @@
18 ---help---
19 TI AR7 partitioning support
20
21 +config MTD_TRX_PARTS
22 + tristate "CyberTAN TRX partitioning support"
23 + depends on MTD_PARTITIONS
24 + ---help---
25 + CyberTAN TRX paritions support
26 +
27 config MTD_MYLOADER_PARTS
28 tristate "MyLoader partition parsing"
29 depends on MTD_PARTITIONS && (ADM5120 || ATHEROS || ATHEROS_AR71XX)
30 diff -ur linux-2.6.28.10-orig/drivers/mtd/Makefile linux-2.6.28.10/drivers/mtd/Makefile
31 --- linux-2.6.28.10-orig/drivers/mtd/Makefile 2009-07-19 10:36:39.000000000 +0200
32 +++ linux-2.6.28.10/drivers/mtd/Makefile 2009-07-22 21:21:30.582601042 +0200
33 @@ -12,6 +12,7 @@
34 obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
35 obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
36 obj-$(CONFIG_MTD_AR7_PARTS) += ar7part.o
37 +obj-$(CONFIG_MTD_TRX_PARTS) += trxpart.o
38 obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o
39 obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o
40
41 diff -urN linux-2.6.28.10-orig/drivers/mtd/trxpart.c linux-2.6.28.10/drivers/mtd/trxpart.c
42 --- linux-2.6.28.10-orig/drivers/mtd/trxpart.c 1970-01-01 01:00:00.000000000 +0100
43 +++ linux-2.6.28.10/drivers/mtd/trxpart.c 2009-07-23 00:00:08.927254359 +0200
44 @@ -0,0 +1,149 @@
45 +/*
46 + * Copyright © 2009 Christian Daniel <cd@maintech.de>
47 + *
48 + * This program is free software; you can redistribute it and/or modify
49 + * it under the terms of the GNU General Public License as published by
50 + * the Free Software Foundation; either version 2 of the License, or
51 + * (at your option) any later version.
52 + *
53 + * This program is distributed in the hope that it will be useful,
54 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
55 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
56 + * GNU General Public License for more details.
57 + *
58 + * You should have received a copy of the GNU General Public License
59 + * along with this program; if not, write to the Free Software
60 + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
61 + *
62 + * TRX flash partition table.
63 + * Based on ar7 map by Felix Fietkau <nbd@openwrt.org>
64 + *
65 + */
66 +
67 +#include <linux/kernel.h>
68 +#include <linux/slab.h>
69 +
70 +#include <linux/mtd/mtd.h>
71 +#include <linux/mtd/partitions.h>
72 +#include <linux/bootmem.h>
73 +#include <linux/magic.h>
74 +
75 +#define TRX_PARTS 6
76 +#define TRX_MAGIC 0x30524448
77 +#define TRX_MAX_OFFSET 3
78 +
79 +struct trx_header {
80 + uint32_t magic; /* "HDR0" */
81 + uint32_t len; /* Length of file including header */
82 + uint32_t crc32; /* 32-bit CRC from flag_version to end of file */
83 + uint32_t flag_version; /* 0:15 flags, 16:31 version */
84 + uint32_t offsets[TRX_MAX_OFFSET]; /* Offsets of partitions from start of header */
85 +};
86 +
87 +#define IH_MAGIC 0x27051956 /* Image Magic Number */
88 +#define IH_NMLEN 32 /* Image Name Length */
89 +
90 +struct uimage_header {
91 + uint32_t ih_magic; /* Image Header Magic Number */
92 + uint32_t ih_hcrc; /* Image Header CRC Checksum */
93 + uint32_t ih_time; /* Image Creation Timestamp */
94 + uint32_t ih_size; /* Image Data Size */
95 + uint32_t ih_load; /* Data» Load Address */
96 + uint32_t ih_ep; /* Entry Point Address */
97 + uint32_t ih_dcrc; /* Image Data CRC Checksum */
98 + uint8_t ih_os; /* Operating System */
99 + uint8_t ih_arch; /* CPU architecture */
100 + uint8_t ih_type; /* Image Type */
101 + uint8_t ih_comp; /* Compression Type */
102 + uint8_t ih_name[IH_NMLEN]; /* Image Name */
103 +};
104 +
105 +static struct mtd_partition trx_parts[TRX_PARTS];
106 +
107 +static int create_mtd_partitions(struct mtd_info *master,
108 + struct mtd_partition **pparts,
109 + unsigned long origin)
110 +{
111 + uint8_t buf[512];
112 + int len;
113 + struct trx_header* header;
114 + struct uimage_header* uheader;
115 + unsigned int kernel_len;
116 +
117 + master->read(master, 4 * master->erasesize, sizeof(buf), &len, buf);
118 + if(strncmp(buf, "NL16", 4) == 0) {
119 + printk(KERN_INFO "TRX on WRT160NL detected\n");
120 +
121 + header = (struct trx_header*)(buf + 32);
122 +
123 + if(le32_to_cpu(header->magic) != TRX_MAGIC) {
124 + printk(KERN_WARNING "TRX messed up\n");
125 + return 0;
126 + }
127 +
128 + uheader = (struct uimage_header*)(buf + 60);
129 +
130 + if(uheader->ih_magic != IH_MAGIC) {
131 + printk(KERN_WARNING "uImage messed up\n");
132 + return 0;
133 + }
134 +
135 + kernel_len = uheader->ih_size / master->erasesize;
136 + if(uheader->ih_size % master->erasesize)
137 + kernel_len++;
138 + kernel_len++;
139 + kernel_len *= master->erasesize;
140 +
141 + trx_parts[0].name = "u-boot";
142 + trx_parts[0].offset = 0;
143 + trx_parts[0].size = 4 * master->erasesize;
144 + trx_parts[0].mask_flags = MTD_WRITEABLE;
145 +
146 + trx_parts[1].name = "kernel";
147 + trx_parts[1].offset = trx_parts[0].offset + trx_parts[0].size;
148 + trx_parts[1].size = kernel_len;
149 + trx_parts[1].mask_flags = 0;
150 +
151 + trx_parts[2].name = "rootfs";
152 + trx_parts[2].offset = trx_parts[1].offset + trx_parts[1].size;
153 + trx_parts[2].size = master->size - 6 * master->erasesize - trx_parts[1].size;
154 + trx_parts[2].mask_flags = 0;
155 +
156 + trx_parts[3].name = "nvram";
157 + trx_parts[3].offset = master->size - 2 * master->erasesize;
158 + trx_parts[3].size = master->erasesize;
159 + trx_parts[3].mask_flags = 0;
160 +
161 + trx_parts[4].name = "ART";
162 + trx_parts[4].offset = master->size - master->erasesize;
163 + trx_parts[4].size = master->erasesize;
164 + trx_parts[4].mask_flags = MTD_WRITEABLE;
165 +
166 + trx_parts[5].name = "firmware";
167 + trx_parts[5].offset = 4 * master->erasesize;
168 + trx_parts[5].size = master->size - 6 * master->erasesize;
169 + trx_parts[5].mask_flags = 0;
170 +
171 + *pparts = trx_parts;
172 +
173 + return TRX_PARTS;
174 + } else {
175 + return 0;
176 + }
177 +}
178 +
179 +static struct mtd_part_parser trx_parser = {
180 + .owner = THIS_MODULE,
181 + .parse_fn = create_mtd_partitions,
182 + .name = "trxpart",
183 +};
184 +
185 +static int __init trx_parser_init(void)
186 +{
187 + return register_mtd_parser(&trx_parser);
188 +}
189 +
190 +module_init(trx_parser_init);
191 +
192 +MODULE_LICENSE("GPL");
193 +MODULE_AUTHOR("Christian Daniel <cd@maintech.de>");
194 +MODULE_DESCRIPTION("MTD partitioning for CyberTAN TRX");