target/linux/ar71xx/patches-3.8/023-MIPS-pci-ar71xx-move-irq-base-to-the-controller-stru.patch

   1 From bec8339e917651e51592dd57ed005f8ccd9b0e8d Mon Sep 17 00:00:00 2001
   2 From: Gabor Juhos <juhosg@openwrt.org>
   3 Date: Thu, 7 Feb 2013 19:29:38 +0000
   4 Subject: [PATCH] MIPS: pci-ar71xx: move irq base to the controller structure
   5
   6 commit 326e8d17d73fdf213f6334917ef46b2ba7b1354a upstream.
   7
   8 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
   9 Patchwork: http://patchwork.linux-mips.org/patch/4928/
  10 Signed-off-by: John Crispin <blogic@openwrt.org>
  11 ---
  12  arch/mips/pci/pci-ar71xx.c |   32 ++++++++++++++++++++++++--------
  13  1 file changed, 24 insertions(+), 8 deletions(-)
  14
  15 --- a/arch/mips/pci/pci-ar71xx.c
  16 +++ b/arch/mips/pci/pci-ar71xx.c
  17 @@ -52,6 +52,7 @@ struct ar71xx_pci_controller {
  18         void __iomem *cfg_base;
  19         spinlock_t lock;
  20         int irq;
  21 +       int irq_base;
  22         struct pci_controller pci_ctrl;
  23         struct resource io_res;
  24         struct resource mem_res;
  25 @@ -238,23 +239,26 @@ static struct pci_ops ar71xx_pci_ops = {
  26
  27  static void ar71xx_pci_irq_handler(unsigned int irq, struct irq_desc *desc)
  28  {
  29 +       struct ar71xx_pci_controller *apc;
  30         void __iomem *base = ath79_reset_base;
  31         u32 pending;
  32
  33 +       apc = irq_get_handler_data(irq);
  34 +
  35         pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) &
  36                   __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  37
  38         if (pending & AR71XX_PCI_INT_DEV0)
  39 -               generic_handle_irq(ATH79_PCI_IRQ(0));
  40 +               generic_handle_irq(apc->irq_base + 0);
  41
  42         else if (pending & AR71XX_PCI_INT_DEV1)
  43 -               generic_handle_irq(ATH79_PCI_IRQ(1));
  44 +               generic_handle_irq(apc->irq_base + 1);
  45
  46         else if (pending & AR71XX_PCI_INT_DEV2)
  47 -               generic_handle_irq(ATH79_PCI_IRQ(2));
  48 +               generic_handle_irq(apc->irq_base + 2);
  49
  50         else if (pending & AR71XX_PCI_INT_CORE)
  51 -               generic_handle_irq(ATH79_PCI_IRQ(4));
  52 +               generic_handle_irq(apc->irq_base + 4);
  53
  54         else
  55                 spurious_interrupt();
  56 @@ -262,10 +266,14 @@ static void ar71xx_pci_irq_handler(unsig
  57
  58  static void ar71xx_pci_irq_unmask(struct irq_data *d)
  59  {
  60 -       unsigned int irq = d->irq - ATH79_PCI_IRQ_BASE;
  61 +       struct ar71xx_pci_controller *apc;
  62 +       unsigned int irq;
  63         void __iomem *base = ath79_reset_base;
  64         u32 t;
  65
  66 +       apc = irq_data_get_irq_chip_data(d);
  67 +       irq = d->irq - apc->irq_base;
  68 +
  69         t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  70         __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  71
  72 @@ -275,10 +283,14 @@ static void ar71xx_pci_irq_unmask(struct
  73
  74  static void ar71xx_pci_irq_mask(struct irq_data *d)
  75  {
  76 -       unsigned int irq = d->irq - ATH79_PCI_IRQ_BASE;
  77 +       struct ar71xx_pci_controller *apc;
  78 +       unsigned int irq;
  79         void __iomem *base = ath79_reset_base;
  80         u32 t;
  81
  82 +       apc = irq_data_get_irq_chip_data(d);
  83 +       irq = d->irq - apc->irq_base;
  84 +
  85         t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  86         __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
  87
  88 @@ -303,11 +315,15 @@ static void ar71xx_pci_irq_init(struct a
  89
  90         BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR71XX_PCI_IRQ_COUNT);
  91
  92 -       for (i = ATH79_PCI_IRQ_BASE;
  93 -            i < ATH79_PCI_IRQ_BASE + AR71XX_PCI_IRQ_COUNT; i++)
  94 +       apc->irq_base = ATH79_PCI_IRQ_BASE;
  95 +       for (i = apc->irq_base;
  96 +            i < apc->irq_base + AR71XX_PCI_IRQ_COUNT; i++) {
  97                 irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip,
  98                                          handle_level_irq);
  99 +               irq_set_chip_data(i, apc);
 100 +       }
 101
 102 +       irq_set_handler_data(apc->irq, apc);
 103         irq_set_chained_handler(apc->irq, ar71xx_pci_irq_handler);
 104  }
 105