target/linux/ar71xx/patches-4.14/952-qca955x-enable-ddr-wb-flush.patch

   1 --- a/arch/mips/ath79/common.c
   2 +++ b/arch/mips/ath79/common.c
   3 @@ -49,6 +49,8 @@ void ath79_ddr_ctrl_init(void)
   4         if (soc_is_ar913x() || soc_is_ar724x() || soc_is_ar933x()) {
   5                 ath79_ddr_wb_flush_base = ath79_ddr_base + 0x7c;
   6                 ath79_ddr_pci_win_base = 0;
   7 +       } else if (soc_is_qca953x() || soc_is_qca955x()) {
   8 +               ath79_ddr_wb_flush_base = ath79_ddr_base + 0x9c;
   9         } else {
  10                 ath79_ddr_wb_flush_base = ath79_ddr_base + 0x9c;
  11                 ath79_ddr_pci_win_base = ath79_ddr_base + 0x7c;
  12 --- a/arch/mips/ath79/irq.c
  13 +++ b/arch/mips/ath79/irq.c
  14 @@ -99,12 +99,12 @@ static void qca955x_ip2_irq_dispatch(str
  15         }
  16
  17         if (status & QCA955X_EXT_INT_PCIE_RC1_ALL) {
  18 -               /* TODO: flush DDR? */
  19 +               ath79_ddr_wb_flush(3);
  20                 generic_handle_irq(ATH79_IP2_IRQ(0));
  21         }
  22
  23         if (status & QCA955X_EXT_INT_WMAC_ALL) {
  24 -               /* TODO: flush DDR? */
  25 +               ath79_ddr_wb_flush(4);
  26                 generic_handle_irq(ATH79_IP2_IRQ(1));
  27         }
  28  }
  29 @@ -124,17 +124,17 @@ static void qca955x_ip3_irq_dispatch(str
  30         }
  31
  32         if (status & QCA955X_EXT_INT_USB1) {
  33 -               /* TODO: flush DDR? */
  34 +               ath79_ddr_wb_flush(2);
  35                 generic_handle_irq(ATH79_IP3_IRQ(0));
  36         }
  37
  38         if (status & QCA955X_EXT_INT_USB2) {
  39 -               /* TODO: flush DDR? */
  40 +               ath79_ddr_wb_flush(2);
  41                 generic_handle_irq(ATH79_IP3_IRQ(1));
  42         }
  43
  44         if (status & QCA955X_EXT_INT_PCIE_RC2_ALL) {
  45 -               /* TODO: flush DDR? */
  46 +               ath79_ddr_wb_flush(3);
  47                 generic_handle_irq(ATH79_IP3_IRQ(2));
  48         }
  49  }