target/linux/aruba-2.6/files/include/asm-mips/idt-boards/rc32434/rc32434.h

   1  /**************************************************************************
   2  *
   3  *  BRIEF MODULE DESCRIPTION
   4  *   Definitions for IDT RC32434 CPU
   5  *
   6  *  Copyright 2004 IDT Inc. (rischelp@idt.com)
   7  *
   8  *  This program is free software; you can redistribute  it and/or modify it
   9  *  under  the terms of  the GNU General  Public License as published by the
  10  *  Free Software Foundation;  either version 2 of the  License, or (at your
  11  *  option) any later version.
  12  *
  13  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  14  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  15  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  16  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  17  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  18  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  19  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  20  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  21  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  22  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  23  *
  24  *  You should have received a copy of the  GNU General Public License along
  25  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  26  *  675 Mass Ave, Cambridge, MA 02139, USA.
  27  *
  28  *
  29  **************************************************************************
  30  * May 2004 rkt, neb.
  31  *
  32  * Initial Release
  33  *
  34  *
  35  *
  36  **************************************************************************
  37  */
  38
  39 #ifndef _RC32434_H_
  40 #define _RC32434_H_
  41
  42 #include <linux/autoconf.h>
  43 #include <linux/delay.h>
  44 #include <asm/io.h>
  45 #include <asm/idt-boards/rc32434/rc32434_timer.h>
  46
  47 #define RC32434_REG_BASE   0x18000000
  48
  49
  50 #define interrupt ((volatile INT_t ) INT0_VirtualAddress)
  51 #define idt_timer     ((volatile TIM_t)  TIM0_VirtualAddress)
  52 #define idt_gpio          ((volatile GPIO_t) GPIO0_VirtualAddress)
  53
  54 #define IDT_CLOCK_MULT 2
  55 #define MIPS_CPU_TIMER_IRQ 7
  56 /* Interrupt Controller */
  57 #define IC_GROUP0_PEND     (RC32434_REG_BASE + 0x38000)
  58 #define IC_GROUP0_MASK     (RC32434_REG_BASE + 0x38008)
  59 #define IC_GROUP_OFFSET    0x0C
  60 #define RTC_BASE           0xBA001FF0
  61
  62 #define NUM_INTR_GROUPS    5
  63 /* 16550 UARTs */
  64
  65 #define GROUP0_IRQ_BASE 8               /* GRP2 IRQ numbers start here */
  66 #define GROUP1_IRQ_BASE (GROUP0_IRQ_BASE + 32) /* GRP3 IRQ numbers start here */
  67 #define GROUP2_IRQ_BASE (GROUP1_IRQ_BASE + 32) /* GRP4 IRQ numbers start here */
  68 #define GROUP3_IRQ_BASE (GROUP2_IRQ_BASE + 32)  /* GRP5 IRQ numbers start here */
  69 #define GROUP4_IRQ_BASE (GROUP3_IRQ_BASE + 32)
  70
  71 #ifdef __MIPSEB__
  72
  73 #define RC32434_UART0_BASE (RC32434_REG_BASE + 0x58003)
  74 #define EB434_UART1_BASE   (0x19800003)
  75
  76 #else
  77
  78 #define RC32434_UART0_BASE (RC32434_REG_BASE + 0x58000)
  79 #define EB434_UART1_BASE   (0x19800000)
  80
  81 #endif
  82
  83 #define RC32434_UART0_IRQ  GROUP3_IRQ_BASE + 0
  84 #define EB434_UART1_IRQ    GROUP4_IRQ_BASE + 11
  85
  86 #define RC32434_NR_IRQS  (GROUP4_IRQ_BASE + 32)
  87
  88 /* cpu pipeline flush */
  89 static inline void rc32434_sync(void)
  90 {
  91         __asm__ volatile ("sync");
  92 }
  93
  94 static inline void rc32434_sync_udelay(int us)
  95 {
  96         __asm__ volatile ("sync");
  97         udelay(us);
  98 }
  99
 100 static inline void rc32434_sync_delay(int ms)
 101 {
 102         __asm__ volatile ("sync");
 103         mdelay(ms);
 104 }
 105
 106
 107
 108 /*
 109  * Macros to access internal RC32434 registers. No byte
 110  * swapping should be done when accessing the internal
 111  * registers.
 112  */
 113
 114 #define rc32434_readb __raw_readb
 115 #define rc32434_readw __raw_readw
 116 #define rc32434_readl __raw_readl
 117
 118 #define rc32434_writeb __raw_writeb
 119 #define rc32434_writew __raw_writew
 120 #define rc32434_writel __raw_writel
 121
 122 #if 0
 123 static inline u8 rc32434_readb(unsigned long pa)
 124 {
 125         return *((volatile u8 *)KSEG1ADDR(pa));
 126 }
 127 static inline u16 rc32434_readw(unsigned long pa)
 128 {
 129         return *((volatile u16 *)KSEG1ADDR(pa));
 130 }
 131 static inline u32 rc32434_readl(unsigned long pa)
 132 {
 133         return *((volatile u32 *)KSEG1ADDR(pa));
 134 }
 135 static inline void rc32434_writeb(u8 val, unsigned long pa)
 136 {
 137         *((volatile u8 *)KSEG1ADDR(pa)) = val;
 138 }
 139 static inline void rc32434_writew(u16 val, unsigned long pa)
 140 {
 141         *((volatile u16 *)KSEG1ADDR(pa)) = val;
 142 }
 143 static inline void rc32434_writel(u32 val, unsigned long pa)
 144 {
 145         *((volatile u32 *)KSEG1ADDR(pa)) = val;
 146 }
 147
 148 #endif
 149
 150
 151 /*
 152  * C access to CLZ and CLO instructions
 153  * (count leading zeroes/ones).
 154  */
 155 static inline int rc32434_clz(unsigned long val)
 156 {
 157         int ret;
 158         __asm__ volatile (
 159                 ".set\tnoreorder\n\t"
 160                 ".set\tnoat\n\t"
 161                 ".set\tmips32\n\t"
 162                 "clz\t%0,%1\n\t"
 163                 ".set\tmips0\n\t"
 164                 ".set\tat\n\t"
 165                 ".set\treorder"
 166                 : "=r" (ret)
 167                 : "r" (val));
 168
 169         return ret;
 170 }
 171 static inline int rc32434_clo(unsigned long val)
 172 {
 173         int ret;
 174         __asm__ volatile (
 175                 ".set\tnoreorder\n\t"
 176                 ".set\tnoat\n\t"
 177                 ".set\tmips32\n\t"
 178                 "clo\t%0,%1\n\t"
 179                 ".set\tmips0\n\t"
 180                 ".set\tat\n\t"
 181                 ".set\treorder"
 182                 : "=r" (ret)
 183                 : "r" (val));
 184
 185         return ret;
 186 }
 187 #endif /* _RC32434_H_ */
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