1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 compatible = "qca,ar7100";
9 bootargs = "console=ttyS0,115200";
18 compatible = "mips,mips24Kc";
19 clocks = <&pll ATH79_CLK_CPU>;
26 ddr_ctrl: memory-controller@18000000 {
27 compatible = "qca,ar7100-ddr-controller";
28 reg = <0x18000000 0x100>;
30 #qca,ddr-wb-channel-cells = <1>;
34 compatible = "ns16550a";
35 reg = <0x18020000 0x20>;
38 clocks = <&pll ATH79_CLK_AHB>;
46 usb_phy: usb-phy@18030000 {
47 compatible = "qca,ar7100-usb-phy";
48 reg = <0x18030000 0x10>;
50 reset-names = "usb-phy", "usb-host", "usb-ohci-dll";
51 resets = <&rst 4>, <&rst 5>, <&rst 6>;
59 compatible = "qca,ar7100-gpio";
60 reg = <0x18040000 0x28>;
69 #interrupt-cells = <2>;
72 pll: pll-controller@18050000 {
73 compatible = "qca,ar7100-pll", "syscon";
74 reg = <0x18050000 0x20>;
77 /* The board must provides the ref clock */
80 clock-output-names = "cpu", "ddr", "ahb";
84 compatible = "qca,ar7130-wdt";
85 reg = <0x18060008 0x8>;
89 clocks = <&pll ATH79_CLK_AHB>;
93 pci_intc: interrupt-controller@18060018 {
94 compatible = "qca,ar7100-misc-intc";
95 reg = <0x18060018 0x4>;
96 interrupt-parent = <&cpuintc>;
99 #interrupt-cells = <1>;
102 rst: reset-controller@18060024 {
103 compatible = "qca,ar7100-reset";
104 reg = <0x18060024 0x4>;
109 pcie0: pcie-controller@17010000 {
110 compatible = "qca,ar7100-pci";
111 #address-cells = <3>;
113 bus-range = <0x0 0x0>;
114 reg = <0x17010000 0x100>;
115 reg-names = "cfg_base";
116 ranges = <0x2000000 0 0x10000000 0x10000000 0 0x07000000 /* pci memory */
117 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
121 interrupt-parent = <&pci_intc>;
124 #interrupt-cells = <1>;
126 interrupt-map-mask = <0xf800 0 0 0>;
127 interrupt-map = <0x8800 0 0 0 &pci_intc 0
128 0x9000 0 0 0 &pci_intc 1
129 0x9800 0 0 0 &pci_intc 2>;
137 compatible = "generic-ehci";
138 reg = <0x1b000000 0x1000>;
140 interrupt-parent = <&cpuintc>;
143 phy-names = "usb-phy";
152 compatible = "generic-ohci";
153 reg = <0x1c000000 0x1000>;
155 interrupt-parent = <&miscintc>;
158 phy-names = "usb-phy";
165 compatible = "qca,ar7100-spi";
166 reg = <0x1f000000 0x10>;
168 clocks = <&pll ATH79_CLK_AHB>;
171 #address-cells = <1>;
179 qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
180 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
181 <&ddr_ctrl 0>, <&ddr_ctrl 1>;
185 compatible = "qca,ar7100-misc-intc";
189 compatible = "qca,ar7100-eth", "syscon";
190 reg = <0x19000000 0x200
193 pll-data = <0x00110000 0x00001099 0x00991099>;
194 pll-reg = <0x4 0x10 17>;
208 compatible = "qca,ar7100-eth", "syscon";
209 reg = <0x1a000000 0x200
212 pll-data = <0x00110000 0x00001099 0x00991099>;
213 pll-reg = <0x4 0x14 19>;