ath79: enable UART in SoC DTSI files
[openwrt/openwrt.git] / target / linux / ath79 / dts / ar7161_aruba_ap-105.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "ar7100.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "aruba,ap-105", "qca,ar7161";
10 model = "Aruba AP-105";
11
12 chosen {
13 bootargs = "console=ttyS0,9600";
14 };
15
16 aliases {
17 led-boot = &led_power_green;
18 led-failsafe = &led_power_red;
19 led-running = &led_power_green;
20 led-upgrade = &led_power_green;
21 label-mac-device = &eth0;
22 };
23
24 extosc: ref {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-output-names = "ref";
28 clock-frequency = <40000000>;
29 };
30
31 leds {
32 compatible = "gpio-leds";
33
34 led_power_green: power_green {
35 label = "green:power";
36 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
37 };
38
39 led_power_red: power_red {
40 label = "red:power";
41 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
42 panic-indicator;
43 };
44
45 wifi_2g_red {
46 label = "red:wlan2g";
47 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
48 };
49
50 wifi_5g_red {
51 label = "red:wlan5g";
52 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
53 };
54 };
55
56 ath9k-leds {
57 compatible = "gpio-leds";
58
59 wifi_2g_green {
60 label = "green:wlan2g";
61 gpios = <&ath9k0 5 GPIO_ACTIVE_LOW>;
62 linux,default-trigger = "phy0tpt";
63 };
64
65 wifi_5g_green {
66 label = "green:wlan5g";
67 gpios = <&ath9k1 5 GPIO_ACTIVE_LOW>;
68 linux,default-trigger = "phy1tpt";
69 };
70 };
71
72 keys {
73 compatible = "gpio-keys";
74
75 reset {
76 label = "reset";
77 linux,code = <KEY_RESTART>;
78 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
79 };
80 };
81
82 i2c {
83 compatible = "i2c-gpio";
84
85 sda-gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
86 scl-gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
87
88 #address-cells = <1>;
89 #size-cells = <0>;
90
91 tpm@29 {
92 compatible = "atmel,at97sc3203s";
93 reg = <0x29>;
94
95 /* triggering it, will also kill system */
96 reset-gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
97 };
98 };
99 };
100
101 &pcie0 {
102 status = "okay";
103
104 ath9k0: wifi@0,11 { /* 2.4 GHz */
105 compatible = "pci168c,0029";
106 mtd-mac-address = <&hwinfo 0x1c>;
107 mtd-mac-address-increment = <1>;
108 reg = <0x8800 0 0 0 0>;
109 #gpio-cells = <2>;
110 gpio-controller;
111 };
112
113 ath9k1: wifi@0,12 { /* 5 GHz */
114 compatible = "pci168c,0029";
115 mtd-mac-address = <&hwinfo 0x1c>;
116 mtd-mac-address-increment = <2>;
117 reg = <0x9000 0 0 0 0>;
118 #gpio-cells = <2>;
119 gpio-controller;
120 };
121 };
122
123 &mdio0 {
124 status = "okay";
125
126 phy-mask = <0x1>;
127
128 phy0: ethernet-phy@0 {
129 reg = <0>;
130 };
131 };
132
133 &eth0 {
134 status = "okay";
135 mtd-mac-address = <&hwinfo 0x1c>;
136
137 pll-data = <0x00110000 0x00001099 0x00991099>;
138
139 phy-mode = "rgmii";
140 phy-handle = <&phy0>;
141 };
142
143 &spi {
144 status = "okay";
145
146 flash@0 {
147 compatible = "jedec,spi-nor";
148 reg = <0>;
149 spi-max-frequency = <25000000>;
150
151 partitions {
152 compatible = "fixed-partitions";
153 #address-cells = <1>;
154 #size-cells = <1>;
155
156 partition@0 {
157 label = "u-boot";
158 reg = <0x000000 0x40000>;
159 read-only;
160 };
161
162 partition@40000 {
163 label = "firmware";
164 reg = <0x40000 0xfa0000>;
165 compatible = "denx,uimage";
166 };
167
168 hwinfo: partition@fe0000 {
169 label = "hwinfo";
170 reg = <0xfe0000 0x10000>;
171 read-only;
172 };
173
174 partition@ff0000 {
175 label = "u-boot-env";
176 reg = <0xff0000 0x10000>;
177 read-only;
178 };
179 };
180 };
181 };