ath79: fix typos in DTS
[openwrt/openwrt.git] / target / linux / ath79 / dts / ar7161_dlink_dir-825-b1.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 /dts-v1/;
3
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6
7 #include "ar7100.dtsi"
8
9 / {
10 compatible = "dlink,dir-825-b1", "qca,ar7161";
11 model = "D-Link DIR825B1";
12
13 aliases {
14 led-boot = &led_power_orange;
15 led-failsafe = &led_power_orange;
16 led-running = &led_power_blue;
17 led-upgrade = &led_power_orange;
18 };
19
20 chosen {
21 bootargs = "console=ttyS0,115200";
22 };
23
24 extosc: ref {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-output-names = "ref";
28 clock-frequency = <40000000>;
29 };
30
31 leds {
32 compatible = "gpio-leds";
33
34 usb {
35 label = "d-link:blue:usb";
36 gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
37 trigger-sources = <&usb_ohci_port>, <&usb_ehci_port>;
38 linux,default-trigger = "usbport";
39 };
40
41 led_power_orange: power_orange {
42 label = "d-link:orange:power";
43 gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
44 default-state = "on";
45 };
46
47 led_power_blue: power_blue {
48 label = "d-link:blue:power";
49 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
50 };
51
52 wps {
53 label = "d-link:blue:wps";
54 gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
55 };
56
57 planet_orange {
58 label = "d-link:orange:planet";
59 gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
60 };
61
62 planet_blue {
63 label = "d-link:blue:planet";
64 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
65 };
66 };
67
68 ath9k-leds {
69 compatible = "gpio-leds";
70
71 wlan2g {
72 label = "d-link:blue:wlan2g";
73 gpios = <&ath9k0 5 GPIO_ACTIVE_LOW>;
74 linux,default-trigger = "phy0tpt";
75 };
76
77 wlan5g {
78 label = "d-link:blue:wlan5g";
79 gpios = <&ath9k1 5 GPIO_ACTIVE_LOW>;
80 linux,default-trigger = "phy1tpt";
81 };
82 };
83
84 keys {
85 compatible = "gpio-keys";
86
87 reset {
88 label = "reset";
89 linux,code = <KEY_RESTART>;
90 gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
91 };
92
93 wps {
94 label = "wps";
95 linux,code = <KEY_WPS_BUTTON>;
96 gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
97 };
98 };
99
100 rtl8366s {
101 compatible = "realtek,rtl8366s";
102 gpio-sda = <&gpio 5 GPIO_ACTIVE_HIGH>;
103 gpio-sck = <&gpio 7 GPIO_ACTIVE_HIGH>;
104 realtek,initvals = <0x06 0x0108>;
105
106 mdio-bus {
107 #address-cells = <1>;
108 #size-cells = <0>;
109 status = "okay";
110
111 phy-mask = <0x10>;
112
113 phy4: ethernet-phy@4 {
114 reg = <4>;
115 phy-mode = "rgmii";
116 };
117 };
118 };
119 };
120
121 &usb1 {
122 #address-cells = <1>;
123 #size-cells = <0>;
124 status = "okay";
125
126 usb_ohci_port: port@1 {
127 reg = <1>;
128 #trigger-source-cells = <0>;
129 };
130 };
131
132 &usb2 {
133 #address-cells = <1>;
134 #size-cells = <0>;
135 status = "okay";
136
137 usb_ehci_port: port@1 {
138 reg = <1>;
139 #trigger-source-cells = <0>;
140 };
141 };
142
143 &usb_phy {
144 status = "okay";
145 };
146
147 &pcie0 {
148 status = "okay";
149
150 ath9k0: wifi@0,11 {
151 compatible = "pci168c,0029";
152 reg = <0x8800 0 0 0 0>;
153 qca,no-eeprom;
154 #gpio-cells = <2>;
155 gpio-controller;
156 };
157
158 ath9k1: wifi@0,12 {
159 compatible = "pci168c,0029";
160 reg = <0x9000 0 0 0 0>;
161 qca,no-eeprom;
162 #gpio-cells = <2>;
163 gpio-controller;
164 };
165 };
166
167 &uart {
168 status = "okay";
169 };
170
171 &pll {
172 clocks = <&extosc>;
173 };
174
175 &spi {
176 status = "okay";
177
178 num-cs = <1>;
179
180 flash@0 {
181 compatible = "jedec,spi-nor";
182 reg = <0>;
183 spi-max-frequency = <25000000>;
184
185 partitions {
186 compatible = "fixed-partitions";
187 #address-cells = <1>;
188 #size-cells = <1>;
189
190 partition@0 {
191 label = "u-boot";
192 reg = <0x000000 0x040000>;
193 read-only;
194 };
195
196 partition@40000 {
197 label = "config";
198 reg = <0x040000 0x010000>;
199 read-only;
200 };
201
202 partition@50000 {
203 compatible = "denx,uimage";
204 label = "firmware";
205 reg = <0x050000 0x610000>;
206 };
207
208 caldata: partition@60000 {
209 label = "caldata";
210 reg = <0x660000 0x010000>;
211 read-only;
212 };
213
214 partition@670000 {
215 label = "unknown";
216 reg = <0x670000 0x190000>;
217 read-only;
218 };
219 };
220 };
221 };
222
223 &eth0 {
224 status = "okay";
225
226 pll-data = <0x11110000 0x00001099 0x00991099>;
227
228 fixed-link {
229 speed = <1000>;
230 full-duplex;
231 };
232 };
233
234 &eth1 {
235 status = "okay";
236
237 pll-data = <0x11110000 0x00001099 0x00991099>;
238
239 phy-handle = <&phy4>;
240 };