ath79: apply Engenius ECB1750 style to OpenMesh MR900 RGMII cfg
[openwrt/openwrt.git] / target / linux / ath79 / dts / ar9344_pcs_cap324.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "ar9344.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 model = "PowerCloud Systems CAP324";
10 compatible = "pcs,cap324", "qca,ar9344";
11
12 aliases {
13 serial0 = &uart;
14 led-boot = &led_power_amber;
15 led-failsafe = &led_power_amber;
16 led-running = &led_power_green;
17 led-upgrade = &led_power_amber;
18 };
19
20 keys {
21 compatible = "gpio-keys";
22
23 pinctrl-names = "default";
24 pinctrl-0 = <&jtag_disable_pins>;
25
26 reset {
27 label = "Reset button";
28 linux,code = <KEY_RESTART>;
29 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
30 debounce-interval = <60>;
31 };
32 };
33
34 leds {
35 compatible = "gpio-leds";
36
37 led_power_amber: power_amber {
38 label = "amber:power";
39 gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
40 };
41
42 led_power_green: power_green {
43 label = "green:power";
44 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
45 default-state = "on";
46 };
47
48 wlan_amber {
49 label = "amber:wlan";
50 gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
51 linux,default-trigger = "phy1tpt";
52 };
53
54 wlan_green {
55 label = "green:wlan";
56 gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
57 linux,default-trigger = "phy0tpt";
58 };
59
60 lan_amber {
61 label = "amber:lan";
62 gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
63 };
64
65 lan_green {
66 label = "green:lan";
67 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
68 };
69 };
70 };
71
72 &ref {
73 clock-frequency = <25000000>;
74 };
75
76 &uart {
77 status = "okay";
78 };
79
80 &spi {
81 status = "okay";
82
83 flash@0 {
84 compatible = "jedec,spi-nor";
85 reg = <0>;
86 spi-max-frequency = <25000000>;
87
88 partitions {
89 compatible = "fixed-partitions";
90 #address-cells = <1>;
91 #size-cells = <1>;
92
93 uboot: partition@0 {
94 label = "u-boot";
95 reg = <0x000000 0x040000>;
96 read-only;
97 };
98
99 partition@40000 {
100 label = "u-boot-env";
101 reg = <0x040000 0x010000>;
102 read-only;
103 };
104
105 partition@50000 {
106 compatible = "denx,uimage";
107 label = "firmware";
108 reg = <0x050000 0x0fa0000>;
109 };
110
111 art: partition@7f0000 {
112 label = "art";
113 reg = <0xff0000 0x010000>;
114 read-only;
115 };
116 };
117 };
118 };
119
120 &pcie {
121 status = "okay";
122
123 ath9k: wifi@0,0 {
124 compatible = "168c,0030";
125 reg = <0x0000 0 0 0 0>;
126 mtd-mac-address = <&art 0x0>;
127 mtd-mac-address-increment = <(-2)>;
128 mtd-cal-data = <&art 0x5000>;
129 qca,no-eeprom;
130 qca,disable-5ghz;
131 #gpio-cells = <2>;
132 gpio-controller;
133 };
134 };
135
136 &wmac {
137 status = "okay";
138
139 qca,disable-2ghz;
140 mtd-cal-data = <&art 0x1000>;
141 mtd-mac-address = <&art 0x0>;
142 mtd-mac-address-increment = <(-1)>;
143 };
144
145 &mdio0 {
146 status = "okay";
147
148 phy-mask = <0>;
149
150 phy0: ethernet-phy@0 {
151 reg = <0>;
152 phy-mode = "rgmii";
153 };
154 };
155
156 &eth0 {
157 status = "okay";
158
159 /* default for ar934x, except for 1000M */
160 pll-data = <0x06000000 0x00000101 0x00001616>;
161
162 mtd-mac-address = <&art 0x0>;
163
164 phy-mode = "rgmii";
165 phy-handle = <&phy0>;
166 };