target/linux/ath79/dts/qca9531_glinet_gl-x300b.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "qca953x.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7
   8 / {
   9         compatible = "glinet,gl-x300b", "qca,qca9531";
  10         model = "GL.iNet GL-X300B";
  11
  12         keys {
  13                 compatible = "gpio-keys";
  14
  15                 pinctrl-names = "default";
  16                 pinctrl-0 = <&jtag_disable_pins>;
  17
  18                 reset {
  19                         label = "reset";
  20                         linux,code = <KEY_RESTART>;
  21                         gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
  22                 };
  23         };
  24
  25         leds {
  26                 compatible = "gpio-leds";
  27
  28                 wlan2g {
  29                         label = "green:wlan2g";
  30                         gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
  31                         linux,default-trigger = "phy0tpt";
  32                 };
  33
  34                 wan {
  35                         label = "green:wan";
  36                         gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
  37                 };
  38
  39                 lte {
  40                         label = "green:lte";
  41                         gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
  42                 };
  43         };
  44
  45         gpio-export {
  46                 compatible = "gpio-export";
  47
  48                 minipcie {
  49                         gpio-export,name = "minipcie";
  50                         gpio-export,output = <0>;
  51                         gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
  52                 };
  53
  54                 rs485tx_en {
  55                         gpio-export,name = "rs485tx_en";
  56                         gpio-export,output = <0>;
  57                         gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
  58                 };
  59
  60                 ble_rst {
  61                         gpio-export,name = "ble_rst";
  62                         gpio-export,output = <0>;
  63                         gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
  64                 };
  65         };
  66
  67         watchdog {
  68                 compatible = "hw_wdt";
  69                 dog_en_gpio = <12>;
  70                 feed_dog_gpio = <2>;
  71                 feed_dog_interval = <100000000>;
  72         };
  73 };
  74
  75 &usb0 {
  76         status = "okay";
  77 };
  78
  79 &usb_phy {
  80         status = "okay";
  81 };
  82
  83 &spi {
  84         status = "okay";
  85
  86         flash@0 {
  87                 compatible = "jedec,spi-nor";
  88                 reg = <0>;
  89                 spi-max-frequency = <25000000>;
  90
  91                 partitions {
  92                         compatible = "fixed-partitions";
  93                         #address-cells = <1>;
  94                         #size-cells = <1>;
  95
  96                         partition@0 {
  97                                 label = "u-boot";
  98                                 reg = <0x000000 0x040000>;
  99                                 read-only;
 100                         };
 101
 102                         partition@40000 {
 103                                 label = "u-boot-env";
 104                                 reg = <0x040000 0x010000>;
 105                         };
 106
 107                         art: partition@50000 {
 108                                 label = "art";
 109                                 reg = <0x050000 0x010000>;
 110                                 read-only;
 111                         };
 112
 113                         partition@60000 {
 114                                 compatible = "denx,uimage";
 115                                 label = "firmware";
 116                                 reg = <0x060000 0xfa0000>;
 117                         };
 118
 119                 };
 120         };
 121 };
 122
 123 &eth0 {
 124         status = "okay";
 125
 126         nvmem-cells = <&macaddr_art_0>;
 127         nvmem-cell-names = "mac-address";
 128
 129         phy-handle = <&swphy4>;
 130 };
 131
 132 &eth1 {
 133         nvmem-cells = <&macaddr_art_0>;
 134         nvmem-cell-names = "mac-address";
 135         mac-address-increment = <1>;
 136 };
 137
 138 &wmac {
 139         status = "okay";
 140
 141         mtd-cal-data = <&art 0x1000>;
 142 };
 143
 144 &art {
 145         compatible = "nvmem-cells";
 146         #address-cells = <1>;
 147         #size-cells = <1>;
 148
 149         macaddr_art_0: macaddr@0 {
 150                 reg = <0x0 0x6>;
 151         };
 152 };