ath79: airtight c-75: use second flash chip
[openwrt/openwrt.git] / target / linux / ath79 / dts / qca9558_librerouter_librerouter-v1.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "qca955x.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "librerouter,librerouter-v1", "qca,qca9558";
10 model = "LibreRouter v1";
11
12 aliases {
13 led-boot = &led_system;
14 led-failsafe = &led_system;
15 led-running = &led_system;
16 led-upgrade = &led_system;
17 };
18
19 leds {
20 compatible = "gpio-leds";
21
22 led_system: system {
23 label = "green:system";
24 gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
25 default-state = "on";
26 };
27
28 wifi_green {
29 label = "green:wlan2g";
30 gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
31 linux,default-trigger = "phy0tpt";
32 };
33
34 status_blue {
35 label = "blue:status";
36 gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
37 };
38 };
39
40 keys {
41 compatible = "gpio-keys";
42
43 reset {
44 label = "Reset";
45 linux,code = <KEY_RESTART>;
46 gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
47 debounce-interval = <60>;
48 };
49 };
50
51 watchdog {
52 compatible = "linux,wdt-gpio";
53 gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
54 hw_algo = "toggle";
55 hw_margin_ms = <1000>;
56 always-running;
57 };
58 };
59
60 &pcie0 {
61 status = "okay";
62
63 wifi@0,0 {
64 compatible = "pci168c,0033";
65 reg = <0x0000 0 0 0 0>;
66 };
67 };
68
69 &pcie1 {
70 status = "okay";
71
72 wifi@0,0 {
73 compatible = "pci168c,0033";
74 reg = <0x0000 0 0 0 0>;
75 };
76 };
77
78 &uart {
79 status = "okay";
80 };
81
82 &usb_phy0 {
83 status = "okay";
84 };
85
86 &usb0 {
87 #address-cells = <1>;
88 #size-cells = <0>;
89 status = "okay";
90 };
91
92 &usb_phy1 {
93 status = "okay";
94 };
95
96 &usb1 {
97 #address-cells = <1>;
98 #size-cells = <0>;
99 status = "okay";
100 };
101
102 &spi {
103 status = "okay";
104
105 flash@0 {
106 compatible = "jedec,spi-nor";
107 reg = <0>;
108 spi-max-frequency = <25000000>;
109
110 partitions {
111 compatible = "fixed-partitions";
112 #address-cells = <1>;
113 #size-cells = <1>;
114
115 partition@0 {
116 label = "u-boot";
117 reg = <0x000000 0x040000>;
118 read-only;
119 };
120
121 partition@40000 {
122 label = "u-boot-env";
123 reg = <0x040000 0x010000>;
124 };
125
126 partition@50000 {
127 compatible = "denx,uimage";
128 label = "firmware";
129 reg = <0x050000 0x7c0000>;
130 };
131
132 partition@810000 {
133 label = "fw2";
134 reg = <0x810000 0x7d0000>;
135 };
136
137 partition@fd0000 {
138 label = "res";
139 reg = <0xfd0000 0x20000>;
140 };
141
142 art: partition@ff0000 {
143 label = "art";
144 reg = <0xff0000 0x010000>;
145 read-only;
146 };
147 };
148 };
149 };
150
151 &mdio0 {
152 status = "okay";
153
154 phy0: ethernet-phy@0 {
155 reg = <0>;
156 qca,ar8327-initvals = <
157 0x04 0x87600000 /* PORT0: RGMII, MAC0/6 exchage, tx_delay 01, rx_delay 10 */
158 0x0c 0x00000080 /* PORT6: SGMII */
159 0x10 0x81000080 /* POWER_ON_STRAP: LED open drain, SerDes auto-neg disabled */
160 0x50 0xcf37cf37 /* LED_CTRL0 */
161 0x54 0xcf37cf37 /* LED_CTRL1 */
162 0x58 0xcf37cf37 /* LED_CTRL2 */
163 0x5c 0x0 /* LED_CTRL3 */
164 0x7c 0x0000007e /* PORT0_STATUS */
165 0x94 0x0000007e /* PORT6 STATUS */
166 >;
167 };
168 };
169
170 &eth0 {
171 status = "okay";
172
173 pll-data = <0xa6000000 0x00000101 0x00001616>;
174 mtd-mac-address = <&art 0x0>;
175
176 phy-handle = <&phy0>;
177 };
178
179 &eth1 {
180 status = "okay";
181
182 pll-data = <0x03000101 0x00000101 0x00001616>;
183 mtd-mac-address = <&art 0x6>;
184
185 fixed-link {
186 speed = <1000>;
187 full-duplex;
188 };
189 };
190
191 &wmac {
192 status = "okay";
193
194 mtd-cal-data = <&art 0x1000>;
195 mtd-mac-address = <&art 0xc>;
196 };